Merge "ARM: dts: msm: Add Gaming variant devicetree for Ravelin"

2026-02-01 08:51:30 +00:00 · 2024-03-12 21:21:16 -07:00
parent 5aee0a210a eccd3629c1
commit dd961d10ee
36 changed files with 210 additions and 13 deletions
--- a/qcom/Makefile
+++ b/qcom/Makefile
@@ -570,12 +570,12 @@ dtbo-$(CONFIG_ARCH_RAVELIN) += ravelin-rumi-overlay.dtbo \
 	montague-apache-overlay.dtbo

 ravelin-rumi-overlay.dtbo-base := ravelin.dtb montague.dtb
-ravelin-atp-overlay.dtbo-base := ravelin.dtb ravelinp.dtb montague.dtb montaguep.dtb
-ravelin-idp-overlay.dtbo-base := ravelin.dtb ravelinp.dtb montague.dtb montaguep.dtb
-ravelin-idp-wcn3988-4gb-overlay.dtbo-base := ravelin-4gb.dtb ravelinp-4gb.dtb
-ravelin-idp-wcn3950-amoled-rcm-overlay.dtbo-base := ravelin.dtb ravelinp.dtb montague.dtb montaguep.dtb
-ravelin-qrd-overlay.dtbo-base := ravelin.dtb ravelinp.dtb montague.dtb montaguep.dtb
-ravelin-qrd-4gb-overlay.dtbo-base := ravelin-4gb.dtb ravelinp-4gb.dtb montague.dtb montaguep.dtb
+ravelin-atp-overlay.dtbo-base := ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb montague.dtb montaguep.dtb
+ravelin-idp-overlay.dtbo-base := ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb montague.dtb montaguep.dtb
+ravelin-idp-wcn3988-4gb-overlay.dtbo-base := ravelin-4gb.dtb ravelinp-4gb.dtb ravelin-sg.dtb ravelinp-sg.dtb
+ravelin-idp-wcn3950-amoled-rcm-overlay.dtbo-base := ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb montague.dtb montaguep.dtb
+ravelin-qrd-overlay.dtbo-base := ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb montague.dtb montaguep.dtb
+ravelin-qrd-4gb-overlay.dtbo-base := ravelin-4gb.dtb ravelinp-4gb.dtb ravelin-sg.dtb ravelinp-sg.dtb montague.dtb montaguep.dtb
 montague-rumi-overlay.dtbo-base := montague.dtb montaguep.dtb
 montague-hsp-overlay.dtbo-base := montague.dtb montaguep.dtb
 montague-moselle-overlay.dtbo-base := montague-4gb.dtb montaguep-4gb.dtb montague.dtb montaguep.dtb
@@ -599,6 +599,18 @@ dtb-$(CONFIG_ARCH_RAVELIN) += ravelin-rumi.dtb \
 	ravelinp-idp-wcn3950-amoled-rcm.dtb \
 	ravelinp-qrd.dtb \
 	ravelinp-qrd-4gb.dtb \
+	ravelin-sg-atp.dtb \
+	ravelin-sg-idp.dtb \
+	ravelin-sg-idp-wcn3950-amoled-rcm.dtb \
+	ravelin-sg-idp-wcn3988-4gb.dtb \
+	ravelin-sg-qrd.dtb \
+	ravelin-sg-qrd-4gb.dtb \
+	ravelinp-sg-atp.dtb \
+	ravelinp-sg-idp.dtb \
+	ravelinp-sg-idp-wcn3950-amoled-rcm.dtb \
+	ravelinp-sg-idp-wcn3988-4gb.dtb \
+	ravelinp-sg-qrd.dtb \
+	ravelinp-sg-qrd-4gb.dtb \
 	montague-rumi.dtb \
 	montague-hsp.dtb \
 	montague-moselle.dtb \
--- a/qcom/ravelin-atp-overlay.dts
+++ b/qcom/ravelin-atp-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin ATP";
 	compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>;
 	qcom,board-id = <33 0>;
 };
--- a/qcom/ravelin-idp-overlay.dts
+++ b/qcom/ravelin-idp-overlay.dts
@@ -7,6 +7,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin IDP";
 	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>;
 	qcom,board-id = <34 0>;
 };
--- a/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts
+++ b/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin WCN3950 IDP + AMOLED + RCM";
 	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>;
 	qcom,board-id = <34 2>;
 };
--- a/qcom/ravelin-idp-wcn3988-4gb-overlay.dts
+++ b/qcom/ravelin-idp-wcn3988-4gb-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin IDP 4GB DDR + WCN3988";
 	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>;
 	qcom,board-id = <34 0x601>;
 };
--- a/qcom/ravelin-qrd-4gb-overlay.dts
+++ b/qcom/ravelin-qrd-4gb-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin QRD 4GB DDR";
 	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>;
 	qcom,board-id = <0x1000B 0x600>;
 };
--- a/qcom/ravelin-qrd-overlay.dts
+++ b/qcom/ravelin-qrd-overlay.dts
@@ -6,7 +6,7 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin QRD";
 	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, <653 0x10000>, <654 0x10000>;
 	qcom,board-id = <0x1000B 0>;
 };

--- a/qcom/ravelin-sg-atp.dts
+++ b/qcom/ravelin-sg-atp.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "ravelin-sg.dtsi"
+#include "ravelin-sg-atp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin SG ATP";
+	compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp";
+	qcom,board-id = <33 0>;
+};
+
--- a/qcom/ravelin-sg-atp.dtsi
+++ b/qcom/ravelin-sg-atp.dtsi
@@ -0,0 +1 @@
+#include "ravelin-atp.dtsi"
--- a/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dts
+++ b/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelin-sg.dtsi"
+#include "ravelin-sg-idp-wcn3950-amoled-rcm.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin SG WCN3950 IDP + AMOLED + RCM";
+	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
+	qcom,board-id = <34 2>;
+};
--- a/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dtsi
+++ b/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dtsi
@@ -0,0 +1,2 @@
+#include "ravelin-idp-wcn3950-amoled-rcm.dtsi"
+
--- a/qcom/ravelin-sg-idp-wcn3988-4gb.dts
+++ b/qcom/ravelin-sg-idp-wcn3988-4gb.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelin-4gb.dtsi"
+#include "ravelin-sg-idp-wcn3988-4gb.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin SG IDP 4GB DDR + WCN3988";
+	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
+	qcom,board-id = <34 0x601>;
+};
--- a/qcom/ravelin-sg-idp-wcn3988-4gb.dtsi
+++ b/qcom/ravelin-sg-idp-wcn3988-4gb.dtsi
@@ -0,0 +1 @@
+#include "ravelin-idp-wcn3988-4gb.dtsi"
--- a/qcom/ravelin-sg-idp.dts
+++ b/qcom/ravelin-sg-idp.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+
+#include "ravelin-sg.dtsi"
+#include "ravelin-adrastea.dtsi"
+#include "ravelin-sg-idp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin SG IDP";
+	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
+	qcom,board-id = <34 0>;
+};
+
--- a/qcom/ravelin-sg-idp.dtsi
+++ b/qcom/ravelin-sg-idp.dtsi
@@ -0,0 +1 @@
+#include "ravelin-idp.dtsi"
--- a/qcom/ravelin-sg-qrd-4gb.dts
+++ b/qcom/ravelin-sg-qrd-4gb.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "ravelin-4gb.dtsi"
+#include "ravelin-sg-qrd-4gb.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin SG QRD 4GB DDR";
+	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
+	qcom,board-id = <0x1000B 0x600>;
+};
+
--- a/qcom/ravelin-sg-qrd-4gb.dtsi
+++ b/qcom/ravelin-sg-qrd-4gb.dtsi
@@ -0,0 +1,2 @@
+#include "ravelin-qrd-4gb.dtsi"
+
--- a/qcom/ravelin-sg-qrd.dts
+++ b/qcom/ravelin-sg-qrd.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+
+#include "ravelin-sg.dtsi"
+#include "ravelin-sg-qrd.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin SG QRD";
+	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+};
+
+
--- a/qcom/ravelin-sg-qrd.dtsi
+++ b/qcom/ravelin-sg-qrd.dtsi
@@ -0,0 +1 @@
+#include "ravelin-qrd.dtsi"
--- a/qcom/ravelin-sg.dts
+++ b/qcom/ravelin-sg.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelin-sg.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin SG SoC";
+	compatible = "qcom,ravelin";
+	qcom,board-id = <0 0>;
+};
+
--- a/qcom/ravelin-sg.dtsi
+++ b/qcom/ravelin-sg.dtsi
@@ -0,0 +1,8 @@
+#include "ravelin.dtsi"
+
+/ {
+
+	model = "Qualcomm Technologies, Inc. Ravelin SG";
+	compatible = "qcom,ravelin";
+	qcom,msm-id = <653 0x10000>;
+};
--- a/qcom/ravelin-vm.dtsi
+++ b/qcom/ravelin-vm.dtsi
@@ -1,7 +1,7 @@
 #include "waipio-vm.dtsi"

 / {
-	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, <653 0x10000>, <654 0x10000>;
 	interrupt-parent = <&vgic>;

 	gunyah-vsock {
--- a/qcom/ravelinp-sg-atp.dts
+++ b/qcom/ravelinp-sg-atp.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "ravelinp-sg.dtsi"
+#include "ravelinp-sg-atp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP SG ATP";
+	compatible = "qcom,ravelinp-atp", "qcom,ravelinp", "qcom,atp";
+	qcom,board-id = <33 0>;
+};
+
--- a/qcom/ravelinp-sg-atp.dtsi
+++ b/qcom/ravelinp-sg-atp.dtsi
@@ -0,0 +1 @@
+#include "ravelin-sg-atp.dtsi"
--- a/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dts
+++ b/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp-sg.dtsi"
+#include "ravelinp-sg-idp-wcn3950-amoled-rcm.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP SG WCN3950 IDP + AMOLED + RCM";
+	compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp";
+	qcom,board-id = <34 2>;
+};
--- a/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dtsi
+++ b/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dtsi
@@ -0,0 +1,2 @@
+#include "ravelin-sg-idp-wcn3950-amoled-rcm.dtsi"
+
--- a/qcom/ravelinp-sg-idp-wcn3988-4gb.dts
+++ b/qcom/ravelinp-sg-idp-wcn3988-4gb.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp-4gb.dtsi"
+#include "ravelinp-sg-idp-wcn3988-4gb.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP SG IDP 4GB DDR + WCN3988";
+	compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp";
+	qcom,board-id = <34 0x601>;
+};
--- a/qcom/ravelinp-sg-idp-wcn3988-4gb.dtsi
+++ b/qcom/ravelinp-sg-idp-wcn3988-4gb.dtsi
@@ -0,0 +1 @@
+#include "ravelin-sg-idp-wcn3988-4gb.dtsi"
--- a/qcom/ravelinp-sg-idp.dts
+++ b/qcom/ravelinp-sg-idp.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+
+#include "ravelinp-sg.dtsi"
+#include "ravelin-adrastea.dtsi"
+#include "ravelinp-sg-idp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP SG IDP";
+	compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp";
+	qcom,board-id = <34 0>;
+};
+
--- a/qcom/ravelinp-sg-idp.dtsi
+++ b/qcom/ravelinp-sg-idp.dtsi
@@ -0,0 +1 @@
+#include "ravelin-sg-idp.dtsi"
--- a/qcom/ravelinp-sg-qrd-4gb.dts
+++ b/qcom/ravelinp-sg-qrd-4gb.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "ravelinp-4gb.dtsi"
+#include "ravelinp-sg-qrd-4gb.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP SG QRD 4GB DDR";
+	compatible = "qcom,ravelinp-qrd", "qcom,ravelinp", "qcom,qrd";
+	qcom,board-id = <0x1000B 0x600>;
+};
+
--- a/qcom/ravelinp-sg-qrd-4gb.dtsi
+++ b/qcom/ravelinp-sg-qrd-4gb.dtsi
@@ -0,0 +1,2 @@
+#include "ravelin-sg-qrd-4gb.dtsi"
+
--- a/qcom/ravelinp-sg-qrd.dts
+++ b/qcom/ravelinp-sg-qrd.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+
+#include "ravelinp-sg.dtsi"
+#include "ravelinp-sg-qrd.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP SG QRD";
+	compatible = "qcom,ravelinp-qrd", "qcom,ravelinp", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+};
+
+
--- a/qcom/ravelinp-sg-qrd.dtsi
+++ b/qcom/ravelinp-sg-qrd.dtsi
@@ -0,0 +1 @@
+#include "ravelin-sg-qrd.dtsi"
--- a/qcom/ravelinp-sg.dts
+++ b/qcom/ravelinp-sg.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp-sg.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP SG SoC";
+	compatible = "qcom,ravelinp";
+	qcom,board-id = <0 0>;
+};
+
--- a/qcom/ravelinp-sg.dtsi
+++ b/qcom/ravelinp-sg.dtsi
@@ -0,0 +1,9 @@
+#include "ravelin-sg.dtsi"
+
+/ {
+
+	model = "Qualcomm Technologies, Inc. RavelinP SG";
+	compatible = "qcom,ravelinp";
+	qcom,msm-id = <654 0x10000>;
+};
+
				`@@ -0,0 +1,2 @@`
				`#include "ravelin-idp-wcn3950-amoled-rcm.dtsi"`
				`@@ -0,0 +1,2 @@`
				`#include "ravelin-sg-idp-wcn3950-amoled-rcm.dtsi"`