Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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Merge "ARM: dts: msm: Enable use-eusb2-phy property on Cape"

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qctecmdr
2022-02-22 09:17:30 -08:00
committed by Gerrit - the friendly Code Review server
parent 7758a7cab8 6a5690ede2
commit e6296ce5f6
2 changed files with 3 additions and 1 deletions
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3
bindings/usb/msm-ssusb.txt
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@@ -60,8 +60,9 @@ Optional properties :
- qcom,core-clk-rate: If present, indicates clock frequency to be set for USB master clock.
- qcom,core-clk-rate-hs: If present, indicates min core clock frequency required to support
hs speed.
- qcom,use-pdc-interrupts: It present, it configures provided PDC IRQ with required
- qcom,use-pdc-interrupts: If present, it configures provided PDC IRQ with required
configuration for wakeup functionality.
- qcom,use-eusb2-phy: If present, it configures provided PDC IRQ according to eUSB2 spec.
- extcon: phandles to external connector devices. First phandle should point to
external connector, which provide type-C based "USB" cable events, the
second should point to external connector device, which provide type-C

1
qcom/cape-usb.dtsi
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@@ -31,6 +31,7 @@
interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",
"ss_phy_irq", "dm_hs_phy_irq";
qcom,use-pdc-interrupts;
qcom,use-eusb2-phy;
qcom,core-clk-rate = <200000000>;
qcom,core-clk-rate-disconnected = <133333333>;