Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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Merge "ARM: dts: msm: Fix the frequency to clock mismatch on anorak"

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qctecmdr
2023-07-07 05:09:03 -07:00
committed by Gerrit - the friendly Code Review server
parent f0269bcaa0 f7a6087e7f
commit ea17b48c22
1 changed files with 9 additions and 9 deletions
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18
qcom/anorak-pcie.dtsi
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@@ -101,9 +101,9 @@
"pcie_cfg_noc_pcie_anoc_ahb_clk",
"pcie_pipe_clk_mux", "pcie_0_pipe_div2_clk",
"pcie_qmip_pcie_ahb_clk", "pcie_pipe_clk_ext_src";
max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>, <0>,
<0>, <0>, <0>, <0>, <100000000>, <0>,
<0>, <0>, <0>, <0>, <0>, <0>;
max-clock-frequency-hz = <0>, <0>, <0>, <19200000>, <0>, <0>,
<0>, <0>, <0>, <0>, <0>, <100000000>,
<0>, <0>, <0>, <0>, <0>;
resets = <&gcc GCC_PCIE_0_BCR>,
<&gcc GCC_PCIE_0_PHY_BCR>;
@@ -367,9 +367,9 @@
"pcie_aggre_noc_0_axi_clk", "pcie_aggre_noc_sf_axi_clk",
"pcie_cfg_noc_pcie_anoc_ahb_clk", "pcie_pipe_clk_mux",
"pcie_1_pipe_div2_clk", "pcie_pipe_clk_ext_src";
max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>, <0>,
<0>, <0>, <0>, <0>, <100000000>, <0>,
<0>, <0>, <0>, <0>, <0>;
max-clock-frequency-hz = <0>, <0>, <0>, <19200000>, <0>, <0>,
<0>, <0>, <0>, <0>, <0>, <100000000>,
<0>, <0>, <0>, <0>;
resets = <&gcc GCC_PCIE_1_BCR>,
<&gcc GCC_PCIE_1_PHY_BCR>;
@@ -638,9 +638,9 @@
"pcie_cfg_noc_pcie_anoc_ahb_clk", "pcie_pipe_clk_mux",
"pcie_phy_aux_clk_mux", "pcie_2_pipe_div2_clk",
"pcie_pipe_clk_ext_src", "pcie_phy_aux_clk_ext_src";
max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>, <0>,
<0>, <0>, <0>, <0>, <100000000>, <0>,
<0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>;
max-clock-frequency-hz = <0>, <0>, <0>, <19200000>, <0>, <0>,
<0>, <0>, <0>, <0>, <0>, <100000000>,
<0>, <0>, <0>, <0>, <0>, <0>, <0>;
resets = <&gcc GCC_PCIE_2_BCR>,
<&gcc GCC_PCIE_2_PHY_BCR>;