mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 04:59:05 +00:00
00f7554e47
Device node changes required on Palima, describing the GPIO configuration for Nfc controller chip. Modified corresponding Nfc device node for ATP, CDP, MTP & QRD platforms. Change-Id: I707a2fa66c4a3896375f92f315f3eab07a1b7744
101 lines
2.3 KiB
Plaintext
101 lines
2.3 KiB
Plaintext
#include "cape-pmic-overlay.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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&soc { };
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&sdhc_2 {
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status = "ok";
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vdd-supply = <&L9C>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&L6C>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 125000>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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cd-gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
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};
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&ufsphy_mem {
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compatible = "qcom,ufs-phy-qmp-v4-cape";
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vdda-phy-supply = <&L7B>;
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vdda-pll-supply = <&L9B>;
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vdda-phy-max-microamp = <197000>;
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vdda-pll-max-microamp = <23700>;
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status = "ok";
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vcc-supply = <&L7B>;
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vcc-max-microamp = <1100000>;
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vccq-supply = <&L9B>;
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vccq-max-microamp = <1200000>;
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qcom,vddp-ref-clk-supply = <&L9B>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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status = "ok";
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};
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&qupv3_se4_spi {
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status = "ok";
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,spi-touch-active = "focaltech,fts_ts";
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focaltech@0 {
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compatible = "focaltech,fts_ts";
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reg = <0x0>;
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spi-max-frequency = <6000000>;
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interrupt-parent = <&tlmm>;
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interrupts = <21 0x2008>;
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focaltech,reset-gpio = <&tlmm 20 0x00>;
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focaltech,irq-gpio = <&tlmm 21 0x2008>;
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focaltech,display-coords = <0 0 1080 2340>;
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focaltech,max-touch-number = <5>;
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focaltech,ic-type = <0x3658D488>;
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focaltech,touch-type = "primary";
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vdd-supply = <&L3C>;
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pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release";
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pinctrl-0 = <&ts_active>;
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pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
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pinctrl-2 = <&ts_release>;
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};
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};
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&qupv3_se9_i2c {
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status = "ok";
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qcom,clk-freq-out = <1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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nq@28 {
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compatible = "qcom,sn-nci";
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reg = <0x28>;
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qcom,sn-irq = <&tlmm 46 0x00>;
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qcom,sn-ven = <&tlmm 34 0x00>;
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qcom,sn-firm = <&tlmm 45 0x00>;
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qcom,sn-clkreq = <&tlmm 35 0x00>;
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qcom,sn-vdd-1p8-supply = <&S10B>;
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qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
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qcom,sn-vdd-1p8-current = <157000>;
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interrupt-parent = <&tlmm>;
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interrupts = <46 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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