Merge "ARM: dts: msm: set ddr bus-width to 8"

This commit is contained in:
qctecmdr
2022-10-09 09:50:19 -07:00
committed by Gerrit - the friendly Code Review server

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@@ -3502,7 +3502,7 @@
qcom_ddr_dcvs_hw: ddr {
compatible = "qcom,dcvs-hw";
qcom,dcvs-hw-type = <0>;
qcom,bus-width = <4>;
qcom,bus-width = <8>;
qcom,freq-tbl = <&ddr_freq_table>;
ddr_dcvs_sp: sp {