Merge "ARM: dts: msm: Disable tmess ctis"

This commit is contained in:
qctecmdr
2022-07-19 06:02:15 -07:00
committed by Gerrit - the friendly Code Review server

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@@ -2818,6 +2818,7 @@
arm,primecell-periphid = <0x000bb922>;
coresight-name = "coresight-cti-tmess_cti_0";
qcom,extended_cti;
status = "disabled";
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
@@ -2829,6 +2830,7 @@
arm,primecell-periphid = <0x000bb922>;
coresight-name = "coresight-cti-tmess_cti_1";
qcom,extended_cti;
status = "disabled";
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
@@ -2840,6 +2842,7 @@
arm,primecell-periphid = <0x000bb922>;
coresight-name = "coresight-cti-tmess_cti_2";
qcom,extended_cti;
status = "disabled";
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
@@ -2851,6 +2854,7 @@
arm,primecell-periphid = <0x000bb922>;
coresight-name = "coresight-cti-tmess_cti_3";
qcom,extended_cti;
status = "disabled";
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
@@ -2862,6 +2866,7 @@
arm,primecell-periphid = <0x000bb922>;
coresight-name = "coresight-cti-tmess_cti_4";
qcom,extended_cti;
status = "disabled";
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};
@@ -2873,6 +2878,7 @@
arm,primecell-periphid = <0x000bb922>;
coresight-name = "coresight-cti-tmess_cpu";
status = "disabled";
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
};