Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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ARM: dts: msm: Add Mproc nodes support on SM8150

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Add smem,hw spinlock,aoss,smp2p and glink pkt device tree
node support on SM8150 for automotive platforms.

Add snapshot of sm8150-smp2p.dtsi from 5.4 kernel with
commit <620e9a513979c6f6f435ea1ab2c0b2cf41a43fe4>
(ARM: dts: msm: Fix override sequence for HS PHYs on direwolf)
to kernel 5.15.

Change-Id: I2f0f1c1c24e0a9f0f89bcc35e1c83236780fa58f
This commit is contained in:
Arun Prakash
2022-01-24 16:00:04 +05:30
committed by Gerrit - the friendly Code Review server
parent 854c80d73d
commit 1f523c7bd6
2 changed files with 198 additions and 8 deletions
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103
qcom/sm8150-smp2p.dtsi Normal file
View File

@@ -0,0 +1,103 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
qcom,smp2p-adsp@1799000c {
compatible = "qcom,smp2p";
qcom,smem = <443>, <429>;
interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 0 10>;
qcom,local-pid = <0>;
qcom,remote-pid = <2>;
adsp_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
adsp_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_rdbg2_out: qcom,smp2p-rdbg2-out {
qcom,entry-name = "rdbg";
#qcom,smem-state-cells = <1>;
};
smp2p_rdbg2_in: qcom,smp2p-rdbg2-in {
qcom,entry-name = "rdbg";
interrupt-controller;
#interrupt-cells = <2>;
};
};
qcom,smp2p-dsps@1799000c {
compatible = "qcom,smp2p";
qcom,smem = <481>, <430>;
interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 0 26>;
qcom,local-pid = <0>;
qcom,remote-pid = <3>;
dsps_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
dsps_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
sleepstate_smp2p_out: sleepstate-out {
qcom,entry-name = "sleepstate";
#qcom,smem-state-cells = <1>;
};
sleepstate_smp2p_in: qcom,sleepstate-in {
qcom,entry-name = "sleepstate_see";
interrupt-controller;
#interrupt-cells = <2>;
};
};
qcom,smp2p-cdsp@1799000c {
compatible = "qcom,smp2p";
qcom,smem = <94>, <432>;
interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 0 6>;
qcom,local-pid = <0>;
qcom,remote-pid = <5>;
cdsp_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,smem-state-cells = <1>;
};
cdsp_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_rdbg5_out: qcom,smp2p-rdbg5-out {
qcom,entry-name = "rdbg";
#qcom,smem-state-cells = <1>;
};
smp2p_rdbg5_in: qcom,smp2p-rdbg5-in {
qcom,entry-name = "rdbg";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_qvrexternal5_out: qcom,smp2p-qvrexternal5-out {
qcom,entry-name = "qvrexternal";
#qcom,smem-state-cells = <1>;
};
};
};

103
qcom/sm8150.dtsi
View File

@@ -965,20 +965,106 @@
};
};
apcs: syscon@17c0000c {
compatible = "syscon";
reg = <0x17c0000c 0x4>;
};
apss_shared: mailbox@17c00000 {
compatible = "qcom,sm8150-apss-shared";
reg = <0x17c00000 0x1000>;
#mbox-cells = <1>;
};
aoss_qmp: power-controller@c300000 {
compatible = "qcom,sm8150-aoss-qmp";
reg = <0x0c300000 0x100000>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apss_shared 0>;
#clock-cells = <0>;
#power-domain-cells = <1>;
};
qmp_aop: qcom,qmp-aop@c300000 {
compatible = "qcom,qmp-mbox";
reg = <0xc300000 0x1000>, <0x17c0000C 0x4>;
reg-names = "msgram", "irq-reg-base";
qcom,irq-mask = <0x1>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
qcom,qmp = <&aoss_qmp>;
label = "aop";
qcom,early-boot;
priority = <0>;
mbox-desc-offset = <0x0>;
#mbox-cells = <1>;
};
tcsr_mutex_block: syscon@1f40000 {
compatible = "syscon";
reg = <0x1f40000 0x20000>;
};
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
syscon = <&tcsr_mutex_block 0 0x1000>;
#hwlock-cells = <1>;
};
smem: qcom,smem@8600000 {
compatible = "qcom,smem";
memory-region = <&smem_region>;
hwlocks = <&tcsr_mutex 3>;
};
sp_scsr: mailbox@188501c {
compatible = "qcom,sm8150-spcs-global";
reg = <0x188501c 0x4>;
#mbox-cells = <1>;
};
sp_scsr_block: syscon@1880000 {
compatible = "syscon";
reg = <0x1880000 0x10000>;
};
intsp: qcom,qsee_irq {
compatible = "qcom,sm8150-qsee-irq";
syscon = <&sp_scsr_block>;
interrupts = <0 348 IRQ_TYPE_LEVEL_HIGH>,
<0 349 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "sp_ipc0",
"sp_ipc1";
interrupt-controller;
#interrupt-cells = <3>;
};
qcom,qsee_irq_bridge {
compatible = "qcom,qsee-ipc-irq-bridge";
qcom,qsee-ipc-irq-spss {
qcom,dev-name = "qsee_ipc_irq_spss";
label = "spss";
interrupt-parent = <&intsp>;
interrupts = <1 0 IRQ_TYPE_LEVEL_HIGH>;
};
};
qcom,glinkpkt {
compatible = "qcom,glinkpkt";
qcom,glinkpkt-apr-apps2 {
qcom,glinkpkt-edge = "adsp";
qcom,glinkpkt-ch-name = "apr_apps2";
qcom,glinkpkt-dev-name = "apr_apps2";
};
};
qcom,smp2p_sleepstate {
compatible = "qcom,smp2p-sleepstate";
qcom,smem-states = <&sleepstate_smp2p_out 0>;
interrupt-parent = <&sleepstate_smp2p_in>;
interrupts = <0 0>;
interrupt-names = "smp2p-sleepstate-in";
};
qcom,secure-buffer {
compatible = "qcom,secure-buffer";
qcom,vmid-cp-camera-preview-ro;
@@ -1029,6 +1115,7 @@
#include "sm8150-dma-heaps.dtsi"
#include "sm8150-gdsc.dtsi"
#include "msm-arm-smmu-sm8150.dtsi"
#include "sm8150-smp2p.dtsi"
&emac_gdsc {
status = "ok";