Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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Merge "ARM: dts: msm: Add initial device tree for khaje"

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qctecmdr
2022-05-20 15:53:10 -07:00
committed by Gerrit - the friendly Code Review server
parent 53b78c4540 95689ad996
commit 4110db1f82
51 changed files with 15004 additions and 0 deletions
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17
qcom/Makefile
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@@ -65,6 +65,23 @@ kalama-dtb-$(CONFIG_ARCH_KALAMA) += \
kalama-overlays-dtb-$(CONFIG_ARCH_KALAMA) += $(KALAMA_BOARDS) $(NOAPQ_KALAMA_BOARDS) $(KALAMA_BASE_DTB) $(KALAMA_APQ_BASE_DTB)
dtb-y += $(kalama-dtb-y)
KHAJE_BASE_DTB += khaje.dtb
KHAJE_BOARDS += \
khaje-idp-overlay.dtbo \
khaje-qrd-overlay.dtbo \
khaje-qrd-hvdcp3p5-overlay.dtbo \
khaje-qrd-nowcd9375-overlay.dtbo \
khaje-idp-nopmi-overlay.dtbo \
khaje-qrd-nopmi-overlay.dtbo \
khaje-idps-display-90hz-overlay.dtbo \
khaje-atp-overlay.dtbo
khaje-dtb-$(CONFIG_ARCH_KHAJE) += \
$(call add-overlays, $(KHAJE_BOARDS) ,$(KHAJE_BASE_DTB))
khaje-overlays-dtb-$(CONFIG_ARCH_KHAJE) += $(KHAJE_BOARDS) $(KHAJE_BASE_DTB)
dtb-y += $(khaje-dtb-y)
cinder-dtb-$(CONFIG_ARCH_CINDER) += cinder-rumi.dtb \
cinder-ru-idp.dtb \
cinder-du-idp.dtb \

1767
qcom/bengal-coresight.dtsi Normal file
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115
qcom/bengal-gdsc.dtsi Normal file
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&soc {
/* GDSCs in GCC */
gcc_camss_top_gdsc: qcom,gdsc@1458004 {
compatible = "qcom,gdsc";
reg = <0x1458004 0x4>;
regulator-name = "gcc_camss_top_gdsc";
status = "disabled";
};
gcc_ufs_phy_gdsc: qcom,gdsc@1445004 {
compatible = "qcom,gdsc";
reg = <0x1445004 0x4>;
regulator-name = "gcc_ufs_phy_gdsc";
status = "disabled";
};
gcc_usb30_prim_gdsc: qcom,gdsc@141a004 {
compatible = "qcom,gdsc";
reg = <0x141a004 0x4>;
regulator-name = "gcc_usb30_prim_gdsc";
status = "disabled";
};
gcc_vcodec0_gdsc: qcom,gdsc@1458098 {
compatible = "qcom,gdsc";
reg = <0x1458098 0x4>;
regulator-name = "gcc_vcodec0_gdsc";
status = "disabled";
};
gcc_venus_gdsc: qcom,gdsc@145807c {
compatible = "qcom,gdsc";
reg = <0x145807c 0x4>;
regulator-name = "gcc_venus_gdsc";
status = "disabled";
};
hlos1_vote_turing_mmu_tbu1_gdsc: qcom,gdsc@147d060 {
compatible = "qcom,gdsc";
reg = <0x147d060 0x4>;
regulator-name = "hlos1_vote_turing_mmu_tbu1_gdsc";
qcom,no-status-check-on-disable;
status = "disabled";
};
hlos1_vote_turing_mmu_tbu0_gdsc: qcom,gdsc@147d07c {
compatible = "qcom,gdsc";
reg = <0x147d07c 0x4>;
regulator-name = "hlos1_vote_turing_mmu_tbu0_gdsc";
qcom,no-status-check-on-disable;
status = "disabled";
};
hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc: qcom,gdsc@147d074 {
compatible = "qcom,gdsc";
reg = <0x147d074 0x4>;
regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc";
qcom,no-status-check-on-disable;
status = "disabled";
};
hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc: qcom,gdsc@147d078 {
compatible = "qcom,gdsc";
reg = <0x147d078 0x4>;
regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc";
qcom,no-status-check-on-disable;
status = "disabled";
};
/* GDSCs in DISPCC */
mdss_core_gdsc: qcom,gdsc@5f03000 {
compatible = "qcom,gdsc";
reg = <0x5f03000 0x4>;
regulator-name = "mdss_core_gdsc";
proxy-supply = <&mdss_core_gdsc>;
qcom,proxy-consumer-enable;
status = "disabled";
};
/* GDSCs in GPUCC */
gpu_gx_domain_addr: syscon@5991508 {
compatible = "syscon";
reg = <0x5991508 0x4>;
};
gpu_cx_hw_ctrl: syscon@5991540 {
compatible = "syscon";
reg = <0x5991540 0x4>;
};
gpu_gx_sw_reset: syscon@5991008 {
compatible = "syscon";
reg = <0x5991008 0x4>;
};
gpu_cx_gdsc: qcom,gdsc@599106c {
compatible = "qcom,gdsc";
reg = <0x599106c 0x4>;
regulator-name = "gpu_cx_gdsc";
hw-ctrl-addr = <&gpu_cx_hw_ctrl>;
qcom,no-status-check-on-disable;
qcom,gds-timeout = <500>;
qcom,clk-dis-wait-val = <8>;
status = "disabled";
};
gpu_gx_gdsc: qcom,gdsc@599100c {
compatible = "qcom,gdsc";
reg = <0x599100c 0x4>;
regulator-name = "gpu_gx_gdsc";
sw-reset = <&gpu_gx_sw_reset>;
domain-addr = <&gpu_gx_domain_addr>;
status = "disabled";
};
};

1196
qcom/bengal-pinctrl.dtsi Normal file
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198
qcom/bengal-qupv3.dtsi Normal file
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&soc {
/* GPI Instance */
gpi_dma0: qcom,gpi-dma@4a00000 {
compatible = "qcom,gpi-dma";
#dma-cells = <5>;
reg = <0x4a00000 0x60000>;
reg-names = "gpi-top";
interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
qcom,max-num-gpii = <10>;
qcom,gpii-mask = <0xf>;
qcom,ev-factor = <2>;
iommus = <&apps_smmu 0xf6 0x0>;
qcom,gpi-ee-offset = <0x10000>;
qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
status = "ok";
};
/* QUPv3_0 wrapper instance */
qupv3_0: qcom,qupv3_0_geni_se@4ac0000 {
compatible = "qcom,geni-se-qup";
reg = <0x4ac0000 0x2000>;
#address-cells = <1>;
#size-cells = <1>;
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
ranges;
status = "ok";
/* Debug UART Instance */
qupv3_se4_2uart: qcom,qup_uart@4a90000 {
compatible = "qcom,geni-debug-uart";
reg = <0x4a90000 0x4000>;
reg-names = "se_phys";
interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se4_2uart_active>;
pinctrl-1 = <&qupv3_se4_2uart_sleep>;
qcom,wrapper-core = <&qupv3_0>;
status = "disabled";
};
/* HS UART Instance */
qupv3_se3_4uart: qcom,qup_uart@4a8c000 {
compatible = "qcom,msm-geni-serial-hs";
reg = <0x4a8c000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk";
clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
pinctrl-names = "default", "active", "sleep";
interrupts-extended = <&intc GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 11 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&qupv3_se3_default_ctsrtsrx>,
<&qupv3_se3_default_tx>;
pinctrl-1 = <&qupv3_se3_ctsrx>, <&qupv3_se3_rts>,
<&qupv3_se3_tx>;
pinctrl-2 = <&qupv3_se3_ctsrx>, <&qupv3_se3_rts>,
<&qupv3_se3_tx>;
qcom,wrapper-core = <&qupv3_0>;
qcom,wakeup-byte = <0xFD>;
status = "disabled";
};
/* I2C Instance */
qupv3_se0_i2c: i2c@4a80000 {
compatible = "qcom,i2c-geni";
reg = <0x4a80000 0x4000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se-clk";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
dmas = <&gpi_dma0 0 0 3 64 0>,
<&gpi_dma0 1 0 3 64 0>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se0_i2c_active>;
pinctrl-1 = <&qupv3_se0_i2c_sleep>;
qcom,wrapper-core = <&qupv3_0>;
status = "disabled";
};
/* I2C Instance */
qupv3_se1_i2c: i2c@4a84000 {
compatible = "qcom,i2c-geni";
reg = <0x4a84000 0x4000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se-clk";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
dmas = <&gpi_dma0 0 1 3 64 0>,
<&gpi_dma0 1 1 3 64 0>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se1_i2c_active>;
pinctrl-1 = <&qupv3_se1_i2c_sleep>;
qcom,wrapper-core = <&qupv3_0>;
status = "disabled";
};
/* I2C Instance */
qupv3_se2_i2c: i2c@4a88000 {
compatible = "qcom,i2c-geni";
reg = <0x4a88000 0x4000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se-clk";
clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
dmas = <&gpi_dma0 0 2 3 64 0>,
<&gpi_dma0 1 2 3 64 0>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se2_i2c_active>;
pinctrl-1 = <&qupv3_se2_i2c_sleep>;
qcom,wrapper-core = <&qupv3_0>;
status = "disabled";
};
/* SPI Instance */
qupv3_se0_spi: spi@4a80000 {
compatible = "qcom,spi-geni";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x4a80000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se0_spi_active>;
pinctrl-1 = <&qupv3_se0_spi_sleep>;
spi-max-frequency = <50000000>;
qcom,wrapper-core = <&qupv3_0>;
dmas = <&gpi_dma0 0 0 1 64 0>,
<&gpi_dma0 1 0 1 64 0>;
dma-names = "tx", "rx";
status = "disabled";
};
/* SPI Instance */
qupv3_se1_spi: spi@4a84000 {
compatible = "qcom,spi-geni";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x4a84000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se1_spi_active>;
pinctrl-1 = <&qupv3_se1_spi_sleep>;
spi-max-frequency = <50000000>;
qcom,wrapper-core = <&qupv3_0>;
dmas = <&gpi_dma0 0 1 1 64 0>,
<&gpi_dma0 1 1 1 64 0>;
dma-names = "tx", "rx";
status = "disabled";
};
/* SPI Instance */
qupv3_se5_spi: spi@4a94000 {
compatible = "qcom,spi-geni";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x4a94000 0x4000>;
reg-names = "se_phys";
clock-names = "se-clk";
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se5_spi_active>;
pinctrl-1 = <&qupv3_se5_spi_sleep>;
spi-max-frequency = <50000000>;
qcom,wrapper-core = <&qupv3_0>;
dmas = <&gpi_dma0 0 5 1 64 0>,
<&gpi_dma0 1 5 1 64 0>;
dma-names = "tx", "rx";
status = "disabled";
};
};
};

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qcom/bengal-regulator.dtsi Normal file
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#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
&rpm_bus {
/* PM6125 S3/S4 - VDD_CX supply */
rpm-regulator-smpa3 {
status = "okay";
VDD_CX_LEVEL:
VDD_GFX_LEVEL:
VDD_MSS_LEVEL:
S3A_LEVEL: pm6125_s3_level: regulator-s3-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s3_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
VDD_CX_FLOOR_LEVEL:
VDD_MSS_FLOOR_LEVEL:
S3A_FLOOR_LEVEL:
pm6125_s3_floor_level: regulator-s3-floor-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s3_floor_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-floor-level;
qcom,always-send-voltage;
};
VDD_CX_LEVEL_AO:
VDD_MSS_LEVEL_AO:
S3A_LEVEL_AO: pm6125_s3_level_ao: regulator-s3-level-ao {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s3_level_ao";
qcom,set = <1>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
cx_cdev: cx-cdev-lvl {
compatible = "qcom,regulator-cooling-device";
regulator-cdev-supply = <&VDD_CX_FLOOR_LEVEL>;
regulator-levels = <RPM_SMD_REGULATOR_LEVEL_NOM
RPM_SMD_REGULATOR_LEVEL_NONE>;
#cooling-cells = <2>;
};
};
/* PM6125 S5 - VDD_MX/WCSS_MX supply */
rpm-regulator-smpa5 {
status = "okay";
VDD_MX_LEVEL:
S5A_LEVEL: pm6125_s5_level: regulator-s5-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s5_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
VDD_MX_FLOOR_LEVEL:
S5A_FLOOR_LEVEL:
pm6125_s5_floor_level: regulator-s5-floor-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s5_floor_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-floor-level;
qcom,always-send-voltage;
};
VDD_MX_LEVEL_AO:
S5A_LEVEL_AO: pm6125_s5_level_ao: regulator-s5-level-ao {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s5_level_ao";
qcom,set = <1>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
mx_cdev: mx-cdev-lvl {
compatible = "qcom,regulator-cooling-device";
regulator-cdev-supply = <&VDD_MX_LEVEL>;
regulator-levels = <RPM_SMD_REGULATOR_LEVEL_NOM
RPM_SMD_REGULATOR_LEVEL_NONE>;
#cooling-cells = <2>;
};
};
rpm-regulator-smpa6 {
status = "okay";
S6A: pm6125_s6: regulator-s6 {
regulator-min-microvolt = <304000>;
regulator-max-microvolt = <1456000>;
qcom,init-voltage = <304000>;
status = "okay";
};
};
rpm-regulator-smpa7 {
status = "okay";
S7A: pm6125_s7: regulator-s7 {
regulator-min-microvolt = <1280000>;
regulator-max-microvolt = <2080000>;
qcom,init-voltage = <1280000>;
status = "okay";
};
};
rpm-regulator-smpa8 {
status = "okay";
S8A: pm6125_s8: regulator-s8 {
regulator-min-microvolt = <1064000>;
regulator-max-microvolt = <1304000>;
qcom,init-voltage = <1064000>;
status = "okay";
};
};
rpm-regulator-ldoa1 {
status = "okay";
L1A: pm6125_l1: regulator-l1 {
regulator-min-microvolt = <952000>;
regulator-max-microvolt = <1152000>;
qcom,init-voltage = <952000>;
status = "okay";
};
};
/* VDD_LPI_MX supply */
rpm-regulator-ldoa2 {
status = "okay";
qcom,resource-name = "rwlm";
qcom,resource-id = <0>;
L2A_LEVEL: pm6125_l2_level: regulator-l2-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l2_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
};
/* VDD_LPI_CX supply */
rpm-regulator-ldoa3 {
status = "okay";
qcom,resource-name = "rwlc";
qcom,resource-id = <0>;
L3A_LEVEL: pm6125_l3_level: regulator-l3-level {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l3_level";
qcom,set = <3>;
regulator-min-microvolt =
<RPM_SMD_REGULATOR_LEVEL_RETENTION>;
regulator-max-microvolt =
<RPM_SMD_REGULATOR_LEVEL_BINNING>;
qcom,use-voltage-level;
};
};
rpm-regulator-ldoa4 {
status = "okay";
L4A: pm6125_l4: regulator-l4 {
regulator-min-microvolt = <488000>;
regulator-max-microvolt = <1000000>;
qcom,init-voltage = <488000>;
status = "okay";
};
};
rpm-regulator-ldoa5 {
status = "okay";
L5A: pm6125_l5: regulator-l5 {
regulator-min-microvolt = <1648000>;
regulator-max-microvolt = <3056000>;
qcom,init-voltage = <1648000>;
status = "okay";
};
};
rpm-regulator-ldoa6 {
status = "okay";
L6A: pm6125_l6: regulator-l6 {
regulator-min-microvolt = <576000>;
regulator-max-microvolt = <656000>;
qcom,init-voltage = <576000>;
status = "okay";
};
};
rpm-regulator-ldoa7 {
status = "okay";
L7A: pm6125_l7: regulator-l7 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1304000>;
qcom,init-voltage = <1200000>;
status = "okay";
};
};
/* WCSS_CX */
rpm-regulator-ldoa8 {
status = "okay";
L8A: pm6125_l8: regulator-l8 {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <728000>;
qcom,init-voltage = <400000>;
status = "okay";
};
};
rpm-regulator-ldoa9 {
status = "okay";
L9A: pm6125_l9: regulator-l9 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
qcom,init-voltage = <1800000>;
status = "okay";
};
};
rpm-regulator-ldoa10 {
status = "okay";
L10A: pm6125_l10: regulator-l10 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1704000>;
status = "okay";
};
};
rpm-regulator-ldoa11 {
status = "okay";
L11A: pm6125_l11: regulator-l11 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1952000>;
qcom,init-voltage = <1704000>;
status = "okay";
};
};
rpm-regulator-ldoa12 {
status = "okay";
L12A: pm6125_l12: regulator-l12 {
regulator-min-microvolt = <1624000>;
regulator-max-microvolt = <1984000>;
qcom,init-voltage = <1624000>;
status = "okay";
};
};
rpm-regulator-ldoa13 {
status = "okay";
L13A: pm6125_l13: regulator-l13 {
regulator-min-microvolt = <1504000>;
regulator-max-microvolt = <1952000>;
qcom,init-voltage = <1504000>;
status = "okay";
};
};
rpm-regulator-ldoa14 {
status = "okay";
L14A: pm6125_l14: regulator-l14 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1704000>;
status = "okay";
};
};
rpm-regulator-ldoa15 {
status = "okay";
L15A: pm6125_l15: regulator-l15 {
regulator-min-microvolt = <2920000>;
regulator-max-microvolt = <3232000>;
qcom,init-voltage = <2920000>;
status = "okay";
};
};
rpm-regulator-ldoa16 {
status = "okay";
L16A: pm6125_l16: regulator-l16 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1704000>;
status = "okay";
};
};
rpm-regulator-ldoa17 {
status = "okay";
L17A: pm6125_l17: regulator-l17 {
regulator-min-microvolt = <1152000>;
regulator-max-microvolt = <1384000>;
qcom,init-voltage = <1152000>;
status = "okay";
};
};
rpm-regulator-ldoa18 {
status = "okay";
L18A: pm6125_l18: regulator-l18 {
regulator-min-microvolt = <1104000>;
regulator-max-microvolt = <1312000>;
qcom,init-voltage = <1104000>;
status = "okay";
};
};
rpm-regulator-ldoa19 {
status = "okay";
L19A: pm6125_l19: regulator-l19 {
regulator-min-microvolt = <1624000>;
regulator-max-microvolt = <3304000>;
qcom,init-voltage = <1624000>;
status = "okay";
};
};
rpm-regulator-ldoa20 {
status = "okay";
L20A: pm6125_l20: regulator-l20 {
regulator-min-microvolt = <1624000>;
regulator-max-microvolt = <3304000>;
qcom,init-voltage = <1624000>;
status = "okay";
};
};
rpm-regulator-ldoa21 {
status = "okay";
L21A: pm6125_l21: regulator-l21 {
regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <3600000>;
qcom,init-voltage = <2400000>;
status = "okay";
};
};
rpm-regulator-ldoa22 {
status = "okay";
L22A: pm6125_l22: regulator-l22 {
regulator-min-microvolt = <2952000>;
regulator-max-microvolt = <3304000>;
qcom,init-voltage = <2952000>;
status = "okay";
};
};
rpm-regulator-ldoa23 {
status = "okay";
L23A: pm6125_l23: regulator-l23 {
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3400000>;
qcom,init-voltage = <3200000>;
status = "okay";
};
};
rpm-regulator-ldoa24 {
status = "okay";
L24A: pm6125_l24: regulator-l24 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <3600000>;
qcom,init-voltage = <2704000>;
status = "okay";
};
};
};

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#include <dt-bindings/thermal/thermal.h>
&thermal_zones {
pm6125-tz {
cooling-maps {
trip0_cpu0 {
trip = <&pm6125_trip0>;
cooling-device =
<&CPU0 THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
trip0_cpu4 {
trip = <&pm6125_trip0>;
cooling-device =
<&CPU4 THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
trip1_cpu1 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu1_isolate 1 1>;
};
trip1_cpu2 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu2_isolate 1 1>;
};
trip1_cpu3 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu3_isolate 1 1>;
};
trip1_cpu4 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu4_isolate 1 1>;
};
trip1_cpu5 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu5_isolate 1 1>;
};
trip1_cpu6 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu6_isolate 1 1>;
};
trip1_cpu7 {
trip = <&pm6125_trip1>;
cooling-device = <&cpu7_isolate 1 1>;
};
};
};
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "khaje-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Khaje ATP";
compatible = "qcom,khaje-atp", "qcom,khaje", "qcom,atp";
qcom,msm-id = <518 0x10000>;
qcom,board-id = <33 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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/dts-v1/;
#include "khaje.dtsi"
#include "khaje-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Khaje ATP";
compatible = "qcom,khaje-atp", "qcom,khaje", "qcom,atp";
qcom,board-id = <33 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/input.h>
#include "khaje-pm7250b.dtsi"
&pm6125_gpios {
eldo9_pin {
usb_eldo9:gpio@c000 {
pins = "gpio1";
function = "normal";
qcom,drive-strength = <2>;
power-source = <0>;
bias-disable;
output-high;
};
};
};
&soc {
vdda_usb_ss_dp_core: vdda_usb_ss_dp_core {
compatible = "regulator-fixed";
regulator-name = "vdd_supply";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
enable-active-high;
gpio = <&pm6125_gpios 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_eldo9>;
};
};
&sdhc_1 {
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&L11A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
&sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
&sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
vdd-supply = <&L22A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 800000>;
vdd-io-supply = <&L5A>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 22000>;
vdd-io-bias-supply = <&L7A>;
qcom,vdd-io-bias-voltage-level = <1256000 1256000>;
qcom,vdd-io-bias-current-level = <0 6000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>;
status = "ok";
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v4";
vdda-phy-supply = <&L4A>; /* 0.9v */
vdda-pll-supply = <&L18A>; /* 1.8v */
vdda-phy-max-microamp = <85700>;
vdda-pll-max-microamp = <18300>;
status = "ok";
};
&ufshc_mem {
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&L24A>;
vcc-voltage-level = <2950000 2960000>;
vccq2-supply = <&L11A>;
vccq2-voltage-level = <1800000 1800000>;
vcc-max-microamp = <800000>;
vccq2-max-microamp = <800000>;
vccq2-pwr-collapse-sup;
qcom,vddp-ref-clk-supply = <&L18A>;
qcom,vddp-ref-clk-max-microamp = <100>;
qcom,vddp-ref-clk-min-uV = <1232000>;
qcom,vddp-ref-clk-max-uV = <1232000>;
status = "ok";
};
&usb_qmp_dp_phy {
vdd-supply = <&vdda_usb_ss_dp_core>;
};
&pm6125_vadc {
pinctrl-0 = <&camera_therm_default &emmc_therm_default &rf_pa1_therm_default>;
rf_pa1_therm {
reg = <ADC5_GPIO4_100K_PU>;
label = "rf_pa1_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
};
&pm6125_adc_tm {
io-channels = <&pm6125_vadc ADC5_AMUX_THM1_100K_PU>,
<&pm6125_vadc ADC5_AMUX_THM2_100K_PU>,
<&pm6125_vadc ADC5_XO_THERM_100K_PU>,
<&pm6125_vadc ADC5_GPIO4_100K_PU>;
rf_pa1_therm {
reg = <ADC5_GPIO4_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&thermal_zones {
rf-pa1-therm-usr {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO4_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
};
&pm6125_gpios {
rf_pa1_therm {
rf_pa1_therm_default: rf_pa1_therm_default {
pins = "gpio7";
bias-high-impedance;
};
};
key_vol_up {
key_vol_up_default: key_vol_up_default {
pins = "gpio5";
function = "normal";
input-enable;
bias-pull-up;
power-source = <0>;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
label = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_vol_up_default>;
vol_up {
label = "volume_up";
gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
linux,code = <KEY_VOLUMEUP>;
linux,can-disable;
debounce-interval = <15>;
gpio-key,wakeup;
};
};
};
&pm7250b_charger {
status = "ok";
io-channels = <&pm7250b_vadc ADC5_USB_IN_V_16>,
<&pm7250b_vadc ADC5_USB_IN_I>,
<&pm7250b_vadc ADC5_CHG_TEMP>,
<&pm7250b_vadc ADC5_DIE_TEMP>,
<&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>,
<&pm7250b_vadc ADC5_SBUx>,
<&pm7250b_vadc ADC5_VPH_PWR>;
io-channel-names = "usb_in_voltage",
"usb_in_current",
"chg_temp",
"die_temp",
"conn_temp",
"sbux_res",
"vph_voltage";
qcom,batteryless-platform;
qcom,sec-charger-config = <0>;
qcom,auto-recharge-soc = <98>;
qcom,step-charging-enable;
qcom,sw-jeita-enable;
qcom,charger-temp-max = <800>;
qcom,suspend-input-on-debug-batt;
};
&pm7250b_qg {
status = "ok";
io-channels = <&pm7250b_vadc ADC5_BAT_THERM_100K_PU>,
<&pm7250b_vadc ADC5_BAT_ID_100K_PU>;
io-channel-names = "batt-therm",
"batt-id";
qcom,qg-iterm-ma = <150>;
qcom,hold-soc-while-full;
qcom,linearize-soc;
qcom,cl-feedback-on;
};
&pm8008_8 {
status = "disabled";
};
&pm8008_9 {
status = "disabled";
};
&pm6125_pwm {
status = "okay";
};
&qupv3_se2_i2c {
status = "okay";
novatek@62 {
reg = <0x62>;
status = "ok";
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
novatek,reset-gpio = <&tlmm 86 0x00>;
novatek,irq-gpio = <&tlmm 80 0x2008>;
};
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
smb5_vbus: qcom,smb5-vbus {
regulator-name = "smb5-vbus";
};
smb5_vconn: qcom,smb5-vconn {
regulator-name = "smb5-vconn";
};
};
&pm7250b_pdphy {
vdd-pdphy-supply = <&L15A>;
vbus-supply = <&smb5_vbus>;
vconn-supply = <&smb5_vconn>;
};
&usb0 {
extcon = <&pm7250b_pdphy>, <&pm7250b_charger>, <&eud>;
};

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#include <dt-bindings/arm/msm/qcom_dma_heap_dt_constants.h>
&soc {
qcom,dma-heaps {
compatible = "qcom,dma-heaps";
qcom,qseecom {
qcom,dma-heap-name = "qcom,qseecom";
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
memory-region = <&qseecom_mem>;
};
qcom,qseecom_ta {
qcom,dma-heap-name = "qcom,qseecom-ta";
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
memory-region = <&qseecom_ta_mem>;
};
qcom,secure_cdsp {
qcom,dma-heap-name = "qcom,secure-cdsp";
qcom,dma-heap-type = <HEAP_TYPE_SECURE_CARVEOUT>;
memory-region = <&cdsp_sec_mem>;
qcom,token = <0x20000000>;
};
qcom,secure_display {
qcom,dma-heap-name = "qcom,secure-display";
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
memory-region = <&secure_display_memory>;
};
qcom,user_contig {
qcom,dma-heap-name = "qcom,user-contig";
qcom,dma-heap-type = <HEAP_TYPE_CMA>;
memory-region = <&user_contig_mem>;
};
};
};

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qcom/khaje-idp-nopmi-overlay.dts Normal file
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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "khaje-idp-nopmi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE IDP nopmi";
compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp";
qcom,msm-id = <518 0x10000>;
qcom,board-id = <0x10022 0>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;
};

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/dts-v1/;
#include "khaje.dtsi"
#include "khaje-idp-nopmi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE IDP nopmi";
compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp";
qcom,board-id = <0x10022 0>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;
};

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#include "khaje-idp.dtsi"
&qupv3_se2_i2c {
synaptics_tcm@20 {
status = "disabled";
};
novatek@62 {
status = "disabled";
};
};
&usb0 {
/delete-property/ extcon;
dwc3@4e00000 {
dr_mode = "peripheral";
};
};

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qcom/khaje-idp-overlay.dts Normal file
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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "khaje-idp.dtsi"
#include "khaje-idp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Khaje IDP";
compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp";
qcom,msm-id = <518 0x10000>;
qcom,board-id = <0x10022 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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#include "khaje-pm7250b.dtsi"
#include "khaje-thermal-pm7250b-overlay.dtsi"
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
&soc {
mtp_batterydata: qcom,battery-data {
qcom,batt-id-range-pct = <15>;
#include "qg-batterydata-alium-3600mah.dtsi"
};
};
&pm7250b_gpios {
pm7250b_smb_int_default: pm7250b_smb_int_default {
pins = "gpio6";
function = "gpio";
input-enable;
bias-pull-up;
qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>;
power-source = <0>;
};
};
&qupv3_se1_i2c {
status = "ok";
#include "smb1355.dtsi"
};
&smb1355 {
pinctrl-names = "default";
pinctrl-0 = <&pm7250b_smb_int_default>;
status = "ok";
};
&smb1355_charger {
qcom,parallel-mode = <1>;
qcom,hw-die-temp-mitigation;
status = "ok";
};
&pm7250b_charger {
status = "ok";
io-channels = <&pm7250b_vadc ADC5_USB_IN_V_16>,
<&pm7250b_vadc ADC5_USB_IN_I>,
<&pm7250b_vadc ADC5_CHG_TEMP>,
<&pm7250b_vadc ADC5_DIE_TEMP>,
<&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>,
<&pm7250b_vadc ADC5_SBUx>,
<&pm7250b_vadc ADC5_VPH_PWR>,
<&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>;
io-channel-names = "usb_in_voltage",
"usb_in_current",
"chg_temp",
"die_temp",
"conn_temp",
"sbux_res",
"vph_voltage",
"skin_temp";
qcom,battery-data = <&mtp_batterydata>;
qcom,sec-charger-config = <2>;
qcom,auto-recharge-soc = <98>;
qcom,step-charging-enable;
qcom,sw-jeita-enable;
qcom,charger-temp-max = <800>;
qcom,smb-temp-max = <800>;
qcom,suspend-input-on-debug-batt;
qcom,fcc-stepping-enable;
qcom,fcc-step-delay-ms = <100>;
qcom,fcc-step-size-ua = <100000>;
qcom,smb-internal-pull-kohm = <0>;
qcom,en-skin-therm-mitigation;
qcom,hvdcp3-standalone-config;
};
&pm7250b_qg {
status = "ok";
io-channels = <&pm7250b_vadc ADC5_BAT_THERM_100K_PU>,
<&pm7250b_vadc ADC5_BAT_ID_100K_PU>;
io-channel-names = "batt-therm",
"batt-id";
qcom,battery-data = <&mtp_batterydata>;
qcom,qg-iterm-ma = <100>;
qcom,hold-soc-while-full;
qcom,linearize-soc;
qcom,cl-feedback-on;
qcom,tcss-enable;
qcom,fvss-enable;
qcom,fvss-vbatt-mv = <3500>;
qcom,bass-enable;
qcom,vbatt-cutoff-mv = <3400>;
qcom,vbatt-low-mv = <3500>;
qcom,vbatt-low-cold-mv = <3800>;
qcom,vbatt-empty-mv = <3200>;
qcom,vbatt-empty-cold-mv = <3100>;
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
smb5_vbus: qcom,smb5-vbus {
regulator-name = "smb5-vbus";
};
smb5_vconn: qcom,smb5-vconn {
regulator-name = "smb5-vconn";
};
};
&pm7250b_pdphy {
vdd-pdphy-supply = <&L15A>;
vbus-supply = <&smb5_vbus>;
vconn-supply = <&smb5_vconn>;
};
&usb0 {
extcon = <&pm7250b_pdphy>, <&pm7250b_charger>, <&eud>;
};

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/dts-v1/;
#include "khaje.dtsi"
#include "khaje-idp.dtsi"
#include "khaje-idp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE IDP";
compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp";
qcom,board-id = <0x10022 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/input.h>
#include "bengal-thermal-overlay.dtsi"
&qupv3_se4_2uart {
status = "ok";
};
&pm6125_vadc {
pinctrl-0 = <&camera_therm_default &emmc_therm_default &rf_pa1_therm_default>;
rf_pa1_therm {
reg = <ADC5_GPIO4_100K_PU>;
label = "rf_pa1_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
};
&pm6125_adc_tm {
io-channels = <&pm6125_vadc ADC5_AMUX_THM1_100K_PU>,
<&pm6125_vadc ADC5_AMUX_THM2_100K_PU>,
<&pm6125_vadc ADC5_XO_THERM_100K_PU>,
<&pm6125_vadc ADC5_GPIO4_100K_PU>;
rf_pa1_therm {
reg = <ADC5_GPIO4_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&thermal_zones {
rf-pa1-therm-usr {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&pm6125_adc_tm ADC5_GPIO4_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
};
&pm6125_gpios {
rf_pa1_therm {
rf_pa1_therm_default: rf_pa1_therm_default {
pins = "gpio7";
bias-high-impedance;
};
};
key_vol_up {
key_vol_up_default: key_vol_up_default {
pins = "gpio5";
function = "normal";
input-enable;
bias-pull-up;
power-source = <0>;
};
};
eldo9_pin {
usb_eldo9:gpio@c000 {
pins = "gpio1";
function = "normal";
qcom,drive-strength = <2>;
power-source = <0>;
bias-disable;
output-high;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
label = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_vol_up_default>;
vol_up {
label = "volume_up";
gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
linux,code = <KEY_VOLUMEUP>;
linux,can-disable;
debounce-interval = <15>;
gpio-key,wakeup;
};
};
vdda_usb_ss_dp_core: vdda_usb_ss_dp_core {
compatible = "regulator-fixed";
regulator-name = "vdd_supply";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
enable-active-high;
gpio = <&pm6125_gpios 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_eldo9>;
};
};
&usb_qmp_dp_phy {
vdd-supply = <&vdda_usb_ss_dp_core>;
};
&qupv3_se1_i2c {
awinic@64 {
compatible = "awinic,aw2016_led";
reg = <0x64>;
awinic,red {
awinic,name = "red";
awinic,id = <0>;
awinic,imax = <2>;
awinic,led-current = <3>;
awinic,max-brightness = <255>;
awinic,rise-time-ms = <6>;
awinic,hold-time-ms = <0>;
awinic,fall-time-ms = <6>;
awinic,off-time-ms = <4>;
};
awinic,green {
awinic,name = "green";
awinic,id = <1>;
awinic,imax = <2>;
awinic,led-current = <3>;
awinic,max-brightness = <255>;
awinic,rise-time-ms = <6>;
awinic,hold-time-ms = <0>;
awinic,fall-time-ms = <6>;
awinic,off-time-ms = <4>;
};
awinic,blue {
awinic,name = "blue";
awinic,id = <2>;
awinic,imax = <2>;
awinic,led-current = <3>;
awinic,max-brightness = <255>;
awinic,rise-time-ms = <6>;
awinic,hold-time-ms = <0>;
awinic,fall-time-ms = <6>;
awinic,off-time-ms = <4>;
};
};
};
&qupv3_se1_i2c {
status = "ok";
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 70 0x00>;
qcom,nq-ven = <&tlmm 69 0x00>;
qcom,nq-firm = <&tlmm 31 0x00>;
qcom,nq-clkreq = <&tlmm 71 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <70 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend>;
};
};
&sdhc_1 {
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&L11A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
&sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
&sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
vdd-supply = <&L22A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 800000>;
vdd-io-supply = <&L5A>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 22000>;
vdd-io-bias-supply = <&L7A>;
qcom,vdd-io-bias-voltage-level = <1256000 1256000>;
qcom,vdd-io-bias-current-level = <0 6000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>;
status = "ok";
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v4";
vdda-phy-supply = <&L4A>; /* 0.9v */
vdda-pll-supply = <&L18A>; /* 1.8v */
vdda-phy-max-microamp = <85700>;
vdda-pll-max-microamp = <18300>;
status = "ok";
};
&ufshc_mem {
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&L24A>;
vcc-voltage-level = <2950000 2960000>;
vccq2-supply = <&L11A>;
vccq2-voltage-level = <1800000 1800000>;
vcc-max-microamp = <800000>;
vccq2-max-microamp = <800000>;
vccq2-pwr-collapse-sup;
qcom,vddp-ref-clk-supply = <&L18A>;
qcom,vddp-ref-clk-max-microamp = <100>;
qcom,vddp-ref-clk-min-uV = <1232000>;
qcom,vddp-ref-clk-max-uV = <1232000>;
status = "ok";
};
&pm6125_pwm {
status = "ok";
};
&qupv3_se2_i2c {
status = "okay";
qcom,i2c-touch-active="synaptics,tcm-i2c";
synaptics_tcm@20 {
compatible = "synaptics,tcm-i2c";
reg = <0x20>;
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
synaptics,irq-gpio = <&tlmm 80 0x2008>;
synaptics,irq-on-state = <0>;
synaptics,reset-gpio = <&tlmm 86 0x00>;
synaptics,reset-on-state = <0>;
synaptics,reset-active-ms = <20>;
synaptics,reset-delay-ms = <200>;
synaptics,power-delay-ms = <200>;
synaptics,ubl-i2c-addr = <0x20>;
synaptics,extend_report;
synaptics,firmware-name = "synaptics_firmware_k.img";
};
novatek@62 {
reg = <0x62>;
status = "ok";
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
novatek,reset-gpio = <&tlmm 86 0x00>;
novatek,irq-gpio = <&tlmm 80 0x2008>;
};
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "khaje-idp.dtsi"
#include "khaje-idp-pm7250b.dtsi"
#include "khaje-idps-display-90hz.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE IDPS + 90Hz";
compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp";
qcom,msm-id = <518 0x10000>;
qcom,board-id = <0x10122 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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/dts-v1/;
#include "khaje.dtsi"
#include "khaje-idp.dtsi"
#include "khaje-idp-pm7250b.dtsi"
#include "khaje-idps-display-90hz.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE IDPS + 90Hz";
compatible = "qcom,khaje-idp", "qcom,khaje", "qcom,idp";
qcom,board-id = <0x10122 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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&soc {
};

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#include "bengal-pinctrl.dtsi"
&tlmm {
compatible = "qcom,khaje-pinctrl";
cam_flash_torch_active: cam_flash_torch_active {
/* TORCH */
mux {
pins = "gpio85";
function = "gpio";
};
config {
pins = "gpio85";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_flash_torch_suspend: cam_flash_torch_suspend {
/* TORCH */
mux {
pins = "gpio85";
function = "gpio";
};
config {
pins = "gpio85";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
cam_flash_tx_active: cam_flash_tx_active {
/* TX */
mux {
pins = "gpio93";
function = "gpio";
};
config {
pins = "gpio93";
bias-disable; /* No PULL */
drive-strength = <2>; /* 2 MA */
};
};
cam_flash_tx_suspend: cam_flash_tx_suspend {
/* TX */
mux {
pins = "gpio93";
function = "gpio";
};
config {
pins = "gpio93";
bias-pull-down; /* PULL DOWN */
drive-strength = <2>; /* 2 MA */
output-low;
};
};
nfc {
nfc_clk_req_active {
/* active state */
mux {
/* GPIO 71: NFC CLOCK REQUEST */
pins = "gpio71";
function = "gpio";
};
config {
pins = "gpio71";
drive-strength = <2>; /* 2 MA */
bias-pull-up;
};
};
nfc_clk_req_suspend {
/* sleep state */
mux {
/* GPIO 71: NFC CLOCK REQUEST */
pins = "gpio71";
function = "gpio";
};
config {
pins = "gpio71";
drive-strength = <2>; /* 2 MA */
bias-disable;
};
};
};
pmx_ts_reset_active {
ts_reset_active: ts_reset_active {
mux {
pins = "gpio86";
function = "gpio";
};
config {
pins = "gpio86";
drive-strength = <8>;
bias-pull-up;
};
};
};
pmx_ts_reset_suspend {
ts_reset_suspend: ts_reset_suspend {
mux {
pins = "gpio86";
function = "gpio";
};
config {
pins = "gpio86";
drive-strength = <2>;
bias-pull-down;
};
};
};
pmx_ts_release {
ts_release: ts_release {
mux {
pins = "gpio80", "gpio86";
function = "gpio";
};
config {
pins = "gpio80", "gpio86";
drive-strength = <2>;
bias-pull-down;
};
};
};
};

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#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include "pm7250b.dtsi"
&pm7250b_clkdiv {
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
};
&pm7250b_vadc {
charger_skin_therm@4d {
reg = <ADC5_AMUX_THM1_100K_PU>;
label = "charger_skin_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
conn_therm@4f {
reg = <ADC5_AMUX_THM3_100K_PU>;
label = "conn_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
};
&pm7250b_adc_tm {
io-channels = <&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>,
<&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>;
/* Channel nodes */
charger_skin_therm@4d {
reg = <ADC5_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
conn_therm@4f {
reg = <ADC5_AMUX_THM3_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&thermal_zones {
charger-therm-usr {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM1_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
conn-therm-usr {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "user_space";
thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM3_100K_PU>;
wake-capable-sensor;
trips {
active-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
};
&pm7250b_gpios {
disp_lcd_bias_en {
disp_lcd_bias_en_default: disp_lcd_bias_en_default {
pins = "gpio5";
function = "func1";
input-disable;
output-enable;
bias-disable;
power-source = <0>;
qcom,drive-strength = <2>;
};
};
};
&pm7250b_pon {
qcom,log-kpd-event;
};

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qcom/khaje-qrd-hvdcp3p5-overlay.dts Normal file
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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "khaje-qrd.dtsi"
#include "khaje-qrd-pm7250b.dtsi"
#include "khaje-qrd-hvdcp3p5.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Khaje QRD HVDCP3P5";
compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd";
qcom,msm-id = <518 0x10000>;
qcom,board-id = <0x1010B 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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/dts-v1/;
#include "khaje.dtsi"
#include "khaje-qrd.dtsi"
#include "khaje-qrd-pm7250b.dtsi"
#include "khaje-qrd-hvdcp3p5.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE QRD HVDCP3P5";
compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd";
qcom,board-id = <0x1010B 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
&pm7250b_gpios {
pm7250b_smb_int_default: pm7250b_smb_int_default {
pins = "gpio6";
function = "gpio";
input-enable;
bias-pull-up;
qcom,pull-up-strength = <PMIC_GPIO_PULL_UP_30>;
power-source = <0>;
};
};
&smb1394 {
qcom,enable-toggle-stat;
pinctrl-names = "default";
pinctrl-0 = <&pm7250b_smb_int_default>;
interrupts = <0x2 0xc5 0x0 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&spmi_bus>;
};

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qcom/khaje-qrd-nopmi-overlay.dts Normal file
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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "khaje-qrd-nopmi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE QRD nopmi overlay";
compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd";
qcom,msm-id = <518 0x10000>;
qcom,board-id = <0x1000B 0>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;
};

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/dts-v1/;
#include "khaje.dtsi"
#include "khaje-qrd-nopmi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE QRD nopmi";
compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;
};

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#include "khaje-qrd.dtsi"
&qupv3_se2_i2c {
synaptics_tcm@20 {
status = "disabled";
};
novatek@62 {
status = "disabled";
};
focaltech@38 {
status = "disabled";
};
};
&usb0 {
/delete-property/ extcon;
dwc3@4e00000 {
dr_mode = "peripheral";
};
};

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qcom/khaje-qrd-nowcd9375-overlay.dts Normal file
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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "khaje-qrd.dtsi"
#include "khaje-qrd-pm7250b.dtsi"
#include "khaje-qrd-nowcd9375.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Khaje QRD NOWCD9375";
compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd";
qcom,msm-id = <518 0x10000>;
qcom,board-id = <0x2010B 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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/dts-v1/;
#include "khaje.dtsi"
#include "khaje-qrd.dtsi"
#include "khaje-qrd-pm7250b.dtsi"
#include "khaje-qrd-nowcd9375.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE QRD NOWCD9375";
compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd";
qcom,board-id = <0x2010B 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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#include "khaje-qrd-hvdcp3p5.dtsi"

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/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "khaje-qrd.dtsi"
#include "khaje-qrd-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Khaje QRD";
compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd";
qcom,msm-id = <518 0x10000>;
qcom,board-id = <0x1000B 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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#include "khaje-pm7250b.dtsi"
#include "khaje-thermal-pm7250b-overlay.dtsi"
&soc {
qrd_batterydata: qcom,battery-data {
qcom,batt-id-range-pct = <15>;
#include "qg-batterydata-atl466271_3300mAh.dtsi"
};
};
&tlmm {
smb_int_default: smb_int_default {
mux {
pins = "gpio105";
function = "gpio";
};
config {
pins = "gpio105";
bias-pull-up;
input-enable;
};
};
};
&qupv3_se1_i2c {
status = "ok";
#include "smb1394.dtsi"
};
&smb1394 {
pinctrl-names = "default";
pinctrl-0 = <&smb_int_default>;
interrupt-parent = <&tlmm>;
interrupt-names = "smb1394";
interrupts = <105 IRQ_TYPE_LEVEL_LOW>;
status = "ok";
};
&smb1394_div2_cp_primary {
io-channels = <&pm7250b_vadc ADC5_AMUX_THM2>;
io-channel-names = "die_temp";
qcom,parallel-input-mode = <1>;
qcom,parallel-output-mode = <2>;
status = "ok";
};
&pm7250b_vadc {
smb1390_therm@e {
qcom,scale-fn-type = <ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP>;
};
};
&pm7250b_charger {
status = "ok";
io-channels = <&pm7250b_vadc ADC5_USB_IN_V_16>,
<&pm7250b_vadc ADC5_USB_IN_I>,
<&pm7250b_vadc ADC5_CHG_TEMP>,
<&pm7250b_vadc ADC5_DIE_TEMP>,
<&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>,
<&pm7250b_vadc ADC5_SBUx>,
<&pm7250b_vadc ADC5_VPH_PWR>,
<&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>;
io-channel-names = "usb_in_voltage",
"usb_in_current",
"chg_temp",
"die_temp",
"conn_temp",
"sbux_res",
"vph_voltage",
"skin_temp";
qcom,battery-data = <&qrd_batterydata>;
qcom,sec-charger-config = <1>;
qcom,auto-recharge-soc = <98>;
qcom,step-charging-enable;
qcom,sw-jeita-enable;
qcom,charger-temp-max = <800>;
qcom,smb-temp-max = <800>;
qcom,suspend-input-on-debug-batt;
qcom,fcc-stepping-enable;
qcom,fcc-step-delay-ms = <100>;
qcom,fcc-step-size-ua = <100000>;
qcom,smb-internal-pull-kohm = <0>;
qcom,thermal-mitigation = <8000000 7500000 7000000 6500000 6000000 5500000
5000000 4500000 4000000 3500000 3000000 2500000 2000000 1500000
1000000 500000>;
};
&pm7250b_qg {
status = "ok";
io-channels = <&pm7250b_vadc ADC5_BAT_THERM_100K_PU>,
<&pm7250b_vadc ADC5_BAT_ID_100K_PU>;
io-channel-names = "batt-therm",
"batt-id";
qcom,qg-iterm-ma = <150>;
qcom,hold-soc-while-full;
qcom,linearize-soc;
qcom,cl-feedback-on;
qcom,tcss-enable;
qcom,fvss-enable;
qcom,fvss-vbatt-mv = <3500>;
qcom,bass-enable;
qcom,vbatt-cutoff-mv = <3400>;
qcom,vbatt-low-mv = <3500>;
qcom,vbatt-low-cold-mv = <3800>;
qcom,vbatt-empty-mv = <3200>;
qcom,vbatt-empty-cold-mv = <3100>;
qcom,use-cp-iin-sns;
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
smb5_vbus: qcom,smb5-vbus {
regulator-name = "smb5-vbus";
};
smb5_vconn: qcom,smb5-vconn {
regulator-name = "smb5-vconn";
};
};
&pm7250b_pdphy {
vdd-pdphy-supply = <&L15A>;
vbus-supply = <&smb5_vbus>;
vconn-supply = <&smb5_vconn>;
};
&usb0 {
extcon = <&pm7250b_pdphy>, <&pm7250b_charger>, <&eud>;
};
&thermal_zones {
quiet-thermal-step {
cooling-maps {
quiet_batt_cdev1 {
trip = <&quiet_batt_trip0>;
cooling-device = <&pm7250b_charger 8 8>;
};
quiet_batt_cdev2 {
trip = <&quiet_batt_trip1>;
cooling-device = <&pm7250b_charger 12 12>;
};
quiet_batt_cdev3 {
trip = <&quiet_batt_trip2>;
cooling-device = <&pm7250b_charger 14 14>;
};
quiet_batt_cdev4 {
trip = <&quiet_batt_trip3>;
cooling-device = <&pm7250b_charger 16 16>;
};
quiet_batt_cdev5 {
trip = <&quiet_batt_trip4>;
cooling-device = <&pm7250b_charger 18 18>;
};
};
};
};

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qcom/khaje-qrd.dts Normal file
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/dts-v1/;
#include "khaje.dtsi"
#include "khaje-qrd.dtsi"
#include "khaje-qrd-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KHAJE QRD";
compatible = "qcom,khaje-qrd", "qcom,khaje", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
qcom,pmic-id = <0x2D 0x2E 0x0 0x0>;
};

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#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/input.h>
#include "bengal-thermal-overlay.dtsi"
&pm6125_gpios {
key_vol_up {
key_vol_up_default: key_vol_up_default {
pins = "gpio5";
function = "normal";
input-enable;
bias-pull-up;
power-source = <0>;
};
};
eldo9_pin {
usb_eldo9:gpio@c000 {
pins = "gpio1";
function = "normal";
qcom,drive-strength = <2>;
power-source = <0>;
bias-disable;
output-high;
};
};
};
&soc {
gpio_keys {
compatible = "gpio-keys";
label = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&key_vol_up_default>;
vol_up {
label = "volume_up";
gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
linux,code = <KEY_VOLUMEUP>;
linux,can-disable;
debounce-interval = <15>;
gpio-key,wakeup;
};
};
vdda_usb_ss_dp_core: vdda_usb_ss_dp_core {
compatible = "regulator-fixed";
regulator-name = "vdd_supply";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
enable-active-high;
gpio = <&pm6125_gpios 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_eldo9>;
};
};
&usb_qmp_dp_phy {
vdd-supply = <&vdda_usb_ss_dp_core>;
};
&qupv3_se1_i2c {
awinic@64 {
compatible = "awinic,aw2016_led";
reg = <0x64>;
awinic,red {
awinic,name = "red";
awinic,id = <0>;
awinic,imax = <2>;
awinic,led-current = <3>;
awinic,max-brightness = <255>;
awinic,rise-time-ms = <6>;
awinic,hold-time-ms = <0>;
awinic,fall-time-ms = <6>;
awinic,off-time-ms = <4>;
};
awinic,green {
awinic,name = "green";
awinic,id = <1>;
awinic,imax = <2>;
awinic,led-current = <3>;
awinic,max-brightness = <255>;
awinic,rise-time-ms = <6>;
awinic,hold-time-ms = <0>;
awinic,fall-time-ms = <6>;
awinic,off-time-ms = <4>;
};
awinic,blue {
awinic,name = "blue";
awinic,id = <2>;
awinic,imax = <2>;
awinic,led-current = <3>;
awinic,max-brightness = <255>;
awinic,rise-time-ms = <6>;
awinic,hold-time-ms = <0>;
awinic,fall-time-ms = <6>;
awinic,off-time-ms = <4>;
};
};
};
&qupv3_se1_i2c {
status = "ok";
#address-cells = <1>;
#size-cells = <0>;
nq@28 {
compatible = "qcom,nq-nci";
reg = <0x28>;
qcom,nq-irq = <&tlmm 70 0x00>;
qcom,nq-ven = <&tlmm 69 0x00>;
qcom,nq-firm = <&tlmm 31 0x00>;
qcom,nq-clkreq = <&tlmm 71 0x00>;
interrupt-parent = <&tlmm>;
interrupts = <70 0>;
interrupt-names = "nfc_irq";
pinctrl-names = "nfc_active", "nfc_suspend";
pinctrl-0 = <&nfc_int_active &nfc_enable_active
&nfc_clk_req_active>;
pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
&nfc_clk_req_suspend>;
};
};
&sdhc_1 {
vdd-supply = <&L24A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 570000>;
vdd-io-supply = <&L11A>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <0 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
&sdc1_rclk_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
&sdc1_rclk_off>;
status = "ok";
};
&sdhc_2 {
vdd-supply = <&L22A>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <0 800000>;
vdd-io-supply = <&L5A>;
qcom,vdd-io-voltage-level = <1800000 2960000>;
qcom,vdd-io-current-level = <0 22000>;
vdd-io-bias-supply = <&L7A>;
qcom,vdd-io-bias-voltage-level = <1256000 1256000>;
qcom,vdd-io-bias-current-level = <0 6000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>;
status = "ok";
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v4";
vdda-phy-supply = <&L4A>; /* 0.9v */
vdda-pll-supply = <&L18A>; /* 1.8v */
vdda-phy-max-microamp = <85700>;
vdda-pll-max-microamp = <18300>;
status = "ok";
};
&ufshc_mem {
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&L24A>;
vcc-voltage-level = <2950000 2960000>;
vccq2-supply = <&L11A>;
vccq2-voltage-level = <1800000 1800000>;
vcc-max-microamp = <800000>;
vccq2-max-microamp = <800000>;
vccq2-pwr-collapse-sup;
qcom,vddp-ref-clk-supply = <&L18A>;
qcom,vddp-ref-clk-max-microamp = <100>;
qcom,vddp-ref-clk-min-uV = <1232000>;
qcom,vddp-ref-clk-max-uV = <1232000>;
status = "ok";
};
&pm6125_pwm {
status = "ok";
};
&qupv3_se2_i2c {
status = "okay";
qcom,i2c-touch-active="synaptics,tcm-i2c";
synaptics_tcm@20 {
compatible = "synaptics,tcm-i2c";
reg = <0x20>;
interrupt-parent = <&tlmm>;
interrupts = <80 0x2008>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
"pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
synaptics,irq-gpio = <&tlmm 80 0x2008>;
synaptics,irq-on-state = <0>;
synaptics,reset-gpio = <&tlmm 86 0x00>;
synaptics,reset-on-state = <0>;
synaptics,reset-active-ms = <20>;
synaptics,reset-delay-ms = <200>;
synaptics,power-delay-ms = <200>;
synaptics,ubl-i2c-addr = <0x20>;
synaptics,extend_report;
synaptics,firmware-name = "synaptics_firmware_k.img";
};
};
&thermal_zones {
quiet-thermal-step {
polling-delay-passive = <2000>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM2_100K_PU>;
wake-capable-sensor;
trips {
quiet_batt_trip0: batt-trip0 {
temperature = <41000>;
hysteresis = <2000>;
type = "passive";
};
quiet_modem_trip0: modem-trip0 {
temperature = <42000>;
hysteresis = <2000>;
type = "passive";
};
quiet_batt_trip1: batt-trip1 {
temperature = <43000>;
hysteresis = <2000>;
type = "passive";
};
quiet_batt_trip2: batt-trip2 {
temperature = <45000>;
hysteresis = <2000>;
type = "passive";
};
quiet_gold_trip: gold-trip {
temperature = <47000>;
hysteresis = <0>;
type = "passive";
};
quiet_batt_trip3: batt-trip3 {
temperature = <47000>;
hysteresis = <2000>;
type = "passive";
};
quiet_batt_trip4: batt-trip4 {
temperature = <48000>;
hysteresis = <1000>;
type = "passive";
};
quiet_gpu_trip: gpu-trip {
temperature = <48000>;
hysteresis = <4000>;
type = "passive";
};
quiet_silver_trip: silver-trip {
temperature = <50000>;
hysteresis = <0>;
type = "passive";
};
quiet_hvx_trip: hvx-trip {
temperature = <52000>;
hysteresis = <4000>;
type = "passive";
};
quiet_modem_trip1: modem-trip1 {
temperature = <60000>;
hysteresis = <4000>;
type = "passive";
};
};
cooling-maps {
gold_cdev {
trip = <&quiet_gold_trip>;
/* limit to 1766400khz */
cooling-device = <&CPU4 THERMAL_NO_LIMIT
(THERMAL_MAX_LIMIT-4)>;
};
silver_cdev {
trip = <&quiet_silver_trip>;
/* limit to 1516800khz */
cooling-device = <&CPU0 THERMAL_NO_LIMIT
(THERMAL_MAX_LIMIT-4)>;
};
gpu_cdev {
trip = <&quiet_gpu_trip>;
};
hvx_cdev {
trip = <&quiet_hvx_trip>;
cooling-device = <&cdsp_sw 4 4>;
};
mdm_cdev0 {
trip = <&quiet_modem_trip0>;
cooling-device = <&modem_proc 1 1>;
};
mdm_cdev1 {
trip = <&quiet_modem_trip1>;
cooling-device = <&modem_proc 3 3>;
};
};
};
pa-therm0-step {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm6125_adc_tm ADC5_AMUX_THM1_100K_PU>;
wake-capable-sensor;
trips {
pa_therm0_trip0: pa-therm0-trip0 {
temperature = <52000>;
hysteresis = <2000>;
type = "passive";
};
pa_therm0_trip1: pa-therm0-trip1 {
temperature = <54000>;
hysteresis = <2000>;
type = "passive";
};
pa_therm0_trip2: pa-therm0-trip2 {
temperature = <60000>;
hysteresis = <4000>;
type = "passive";
};
};
cooling-maps {
modem_cdev0 {
trip = <&pa_therm0_trip0>;
cooling-device = <&modem_pa 1 1>;
};
modem_cdev1 {
trip = <&pa_therm0_trip1>;
cooling-device = <&modem_pa 2 2>;
};
modem_cdev2 {
trip = <&pa_therm0_trip2>;
cooling-device = <&modem_pa 3 3>;
};
};
};
};
&tlmm {
fpc_reset_int: fpc_reset_int {
fpc_reset_low: reset_low {
mux {
pins = "gpio104";
function = "gpio";
};
config {
pins = "gpio104";
drive-strength = <2>;
bias-disable;
output-low;
};
};
fpc_reset_high: reset_high {
mux {
pins = "gpio104";
function = "gpio";
};
config {
pins = "gpio104";
drive-strength = <2>;
bias-disable;
output-high;
};
};
fpc_int_low: int_low {
mux {
pins = "gpio97";
function = "gpio";
};
config {
pins = "gpio97";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
};
};
};

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#include "bengal-regulator.dtsi"
&S6A {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1419000>;
qcom,init-voltage = <1352000>;
};
&S7A {
regulator-min-microvolt = <1569000>;
regulator-max-microvolt = <2040000>;
qcom,init-voltage = <2040000>;
};
&S8A {
regulator-min-microvolt = <1060000>;
regulator-max-microvolt = <1170000>;
qcom,init-voltage = <1128000>;
};
&L1A {
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1150000>;
qcom,init-voltage = <1000000>;
};
&L4A {
regulator-min-microvolt = <720000>;
regulator-max-microvolt = <1050000>;
qcom,init-voltage = <880000>;
};
&L5A {
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <3050000>;
qcom,init-voltage = <2960000>;
};
&L6A {
regulator-min-microvolt = <570000>;
regulator-max-microvolt = <650000>;
qcom,init-voltage = <624000>;
};
&L7A {
regulator-max-microvolt = <1300000>;
qcom,init-voltage = <1256000>;
};
&L8A {
qcom,init-voltage = <704000>;
};
&L9A {
regulator-min-microvolt = <1504000>;
qcom,init-voltage = <1800000>;
};
&L10A {
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
qcom,init-voltage = <1800000>;
};
&L11A {
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1950000>;
qcom,init-voltage = <1800000>;
};
&L12A {
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <1980000>;
qcom,init-voltage = <1800000>;
};
&L13A {
regulator-min-microvolt = <1504000>;
regulator-max-microvolt = <2000000>;
qcom,init-voltage = <1800000>;
};
&L14A {
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
qcom,init-voltage = <1700000>;
};
&L15A {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3544000>;
qcom,init-voltage = <3080000>;
};
&L16A {
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
qcom,init-voltage = <1700000>;
};
&L17A {
regulator-min-microvolt = <1220000>;
regulator-max-microvolt = <1304000>;
qcom,init-voltage = <1220000>;
};
&L18A {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
qcom,init-voltage = <1232000>;
};
&L19A {
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <3300000>;
qcom,init-voltage = <1620000>;
};
&L20A {
regulator-min-microvolt = <1620000>;
regulator-max-microvolt = <3300000>;
qcom,init-voltage = <1620000>;
};
&L21A {
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3544000>;
qcom,init-voltage = <1600000>;
};
&L22A {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <3300000>;
qcom,init-voltage = <2960000>;
};
&L24A {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3544000>;
qcom,init-voltage = <2960000>;
};
&soc {
refgen: refgen-regulator@1600000 {
compatible = "qcom,refgen-kona-regulator";
reg = <0x1600000 0x84>;
regulator-name = "refgen";
regulator-enable-ramp-delay = <5>;
proxy-supply = <&refgen>;
qcom,proxy-consumer-enable;
};
};

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#include <dt-bindings/thermal/thermal.h>
&thermal_zones {
pm7250b-tz {
cooling-maps {
trip0_bat {
trip = <&pm7250b_trip0>;
cooling-device =
<&pm7250b_charger (THERMAL_MAX_LIMIT-1)
(THERMAL_MAX_LIMIT-1)>;
};
trip1_bat {
trip = <&pm7250b_trip1>;
cooling-device =
<&pm7250b_charger THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
};
};
soc {
cooling-maps {
soc_cpu4 {
trip = <&soc_trip>;
cooling-device = <&cpu4_isolate 1 1>;
};
soc_cpu5 {
trip = <&soc_trip>;
cooling-device = <&cpu5_isolate 1 1>;
};
soc_cpu6 {
trip = <&soc_trip>;
cooling-device = <&cpu6_isolate 1 1>;
};
soc_cpu7 {
trip = <&soc_trip>;
cooling-device = <&cpu7_isolate 1 1>;
};
};
};
pm7250b-bcl-lvl0 {
cooling-maps {
lbat0_cpufreq4 {
trip = <&b_bcl_lvl0>;
cooling-device =
<&CPU4 (THERMAL_MAX_LIMIT-4)
(THERMAL_MAX_LIMIT-4)>;
};
lbat0_cpu6 {
trip = <&b_bcl_lvl0>;
cooling-device = <&cpu6_isolate 1 1>;
};
lbat0_cpu7 {
trip = <&b_bcl_lvl0>;
cooling-device = <&cpu7_isolate 1 1>;
};
lbat0_gpu {
trip = <&b_bcl_lvl0>;
};
lbat0_cdsp {
trip = <&b_bcl_lvl0>;
cooling-device = <&cdsp_sw 2 2>;
};
};
};
pm7250b-bcl-lvl1 {
cooling-maps {
lbat1_cpu4 {
trip = <&b_bcl_lvl1>;
cooling-device = <&cpu4_isolate 1 1>;
};
lbat1_cpu5 {
trip = <&b_bcl_lvl1>;
cooling-device = <&cpu5_isolate 1 1>;
};
lbat1_gpu {
trip = <&b_bcl_lvl1>;
};
lbat1_cdsp {
trip = <&b_bcl_lvl1>;
cooling-device = <&cdsp_sw 4 4>;
};
};
};
pm7250b-bcl-lvl2 {
cooling-maps {
lbat2_gpu {
trip = <&b_bcl_lvl2>;
};
lbat2_cdsp {
trip = <&b_bcl_lvl2>;
cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT
THERMAL_MAX_LIMIT>;
};
};
};
};

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#include <dt-bindings/clock/qcom,gcc-khaje.h>
#include <dt-bindings/phy/qcom,khaje-qmp-usb3.h>
&soc {
/* Primary USB port related controller */
usb0: ssusb@4e00000 {
compatible = "qcom,dwc-usb3-msm";
reg = <0x4e00000 0x100000>;
reg-names = "core_base";
iommus = <&apps_smmu 0x120 0x0>;
qcom,iommu-dma = "atomic";
qcom,iommu-dma-addr-pool = <0x50000000 0x60000000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 184 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 188 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "pwr_event_irq", "ss_phy_irq",
"dp_hs_phy_irq", "dm_hs_phy_irq";
clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
"xo", "sleep_clk", "utmi_clk";
resets = <&gcc GCC_USB30_PRIM_BCR>;
reset-names = "core_reset";
USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>;
dpdm-supply = <&usb2_phy0>;
qcom,core-clk-rate = <133333333>;
qcom,core-clk-rate-hs = <66666667>;
qcom,num-gsi-evt-buffs = <0x3>;
qcom,gsi-reg-offset =
<0x0fc /* GSI_GENERAL_CFG */
0x110 /* GSI_DBL_ADDR_L */
0x120 /* GSI_DBL_ADDR_H */
0x130 /* GSI_RING_BASE_ADDR_L */
0x144 /* GSI_RING_BASE_ADDR_H */
0x1a4>; /* GSI_IF_STS */
qcom,dwc-usb3-msm-tx-fifo-size = <21288>;
qcom,gsi-disable-io-coherency;
dwc3@4e00000 {
compatible = "snps,dwc3";
reg = <0x4e00000 0xe000>;
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb2_phy0>, <&usb_qmp_dp_phy>;
tx-fifo-resize;
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3-u1u2-disable;
snps,usb3_lpm_capable;
usb-core-id = <0>;
maximum-speed = "super-speed";
dr_mode = "otg";
};
qcom,usbbam@0x04f04000 {
compatible = "qcom,usb-bam-msm";
reg = <0x04f04000 0x17000>;
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
qcom,usb-bam-fifo-baseaddr = <0xc121000>;
qcom,usb-bam-num-pipes = <4>;
qcom,disable-clk-gating;
qcom,usb-bam-override-threshold = <0x4001>;
qcom,usb-bam-max-mbps-highspeed = <400>;
qcom,usb-bam-max-mbps-superspeed = <3600>;
qcom,reset-bam-on-connect;
qcom,pipe0 {
label = "ssusb-qdss-in-0";
qcom,usb-bam-mem-type = <2>;
qcom,dir = <1>;
qcom,pipe-num = <0>;
qcom,peer-bam = <0>;
qcom,peer-bam-physical-address = <0x08064000>;
qcom,src-bam-pipe-index = <0>;
qcom,dst-bam-pipe-index = <0>;
qcom,data-fifo-offset = <0x0>;
qcom,data-fifo-size = <0x1800>;
qcom,descriptor-fifo-offset = <0x1800>;
qcom,descriptor-fifo-size = <0x800>;
};
};
};
/* Primary USB port related High Speed PHY */
usb2_phy0: hsphy@1613000 {
compatible = "qcom,usb-hsphy-snps-femto";
reg = <0x1613000 0x110>,
<0x1612000 0x4>;
reg-names = "hsusb_phy_base",
"eud_enable_reg";
vdd-supply = <&L4A>;
vdda18-supply = <&L12A>;
vdda33-supply = <&L15A>;
qcom,vdd-voltage-level = <0 880000 880000>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&gcc GCC_AHB2PHY_USB_CLK>;
clock-names = "ref_clk_src", "cfg_ahb_clk";
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
reset-names = "phy_reset";
qcom,param-override-seq =
<0xa6 0x6c>, /* override_x0 */
<0x85 0x70>, /* override_x1 */
<0x16 0x74>; /* override_x2 */
};
/* Primary USB port related QMP USB PHY */
usb_qmp_dp_phy: ssphy@1615000 {
compatible = "qcom,usb-ssphy-qmp-dp-combo";
reg = <0x01615000 0x3000>;
reg-names = "qmp_phy_base";
core-supply = <&L18A>;
qcom,vdd-voltage-level = <0 880000 880000>;
qcom,core-voltage-level = <0 1232000 1260000>;
clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK_SRC>,
<&usb3_phy_wrapper_gcc_usb30_pipe_clk>,
<&rpmcc RPM_SMD_XO_CLK_SRC>,
<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
<&gcc GCC_AHB2PHY_USB_CLK>;
clock-names = "aux_clk", "pipe_clk", "pipe_clk_mux",
"pipe_clk_ext_src", "ref_clk_src",
"com_aux_clk","cfg_ahb_clk";
resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
<&gcc GCC_USB3_PHY_PRIM_SP0_BCR>;
reset-names = "global_phy_reset", "phy_reset";
qcom,qmp-phy-reg-offset =
<USB3_DP_PCS_PCS_STATUS1
USB3_DP_PCS_USB3_AUTONOMOUS_MODE_CTRL
USB3_DP_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR
USB3_DP_PCS_POWER_DOWN_CONTROL
USB3_DP_PCS_SW_RESET
USB3_DP_PCS_START_CONTROL
0xffff /* USB3_PHY_PCS_MISC_TYPEC_CTRL */
0x2a18 /* USB3_DP_DP_PHY_PD_CTL */
USB3_DP_COM_POWER_DOWN_CTRL
USB3_DP_COM_SW_RESET
USB3_DP_COM_RESET_OVRD_CTRL
USB3_DP_COM_PHY_MODE_CTRL
USB3_DP_COM_TYPEC_CTRL
USB3_DP_COM_SWI_CTRL
USB3_DP_PCS_CLAMP_ENABLE>;
qcom,qmp-phy-init-seq =
/* <reg_offset, value, delay> */
<USB3_DP_QSERDES_COM_SSC_EN_CENTER 0x01 0
USB3_DP_QSERDES_COM_SSC_PER1 0x31 0
USB3_DP_QSERDES_COM_SSC_PER2 0x01 0
USB3_DP_QSERDES_COM_SSC_STEP_SIZE1_MODE0 0xDE 0
USB3_DP_QSERDES_COM_SSC_STEP_SIZE2_MODE0 0x07 0
USB3_DP_QSERDES_COM_SSC_STEP_SIZE1_MODE1 0xDE 0
USB3_DP_QSERDES_COM_SSC_STEP_SIZE2_MODE1 0x07 0
USB3_DP_QSERDES_COM_SYSCLK_BUF_ENABLE 0x0A 0
USB3_DP_QSERDES_COM_CMN_IPTRIM 0x20 0
USB3_DP_QSERDES_COM_CP_CTRL_MODE0 0x06 0
USB3_DP_QSERDES_COM_CP_CTRL_MODE1 0x06 0
USB3_DP_QSERDES_COM_PLL_RCTRL_MODE0 0x16 0
USB3_DP_QSERDES_COM_PLL_RCTRL_MODE1 0x16 0
USB3_DP_QSERDES_COM_PLL_CCTRL_MODE0 0x36 0
USB3_DP_QSERDES_COM_PLL_CCTRL_MODE1 0x36 0
USB3_DP_QSERDES_COM_SYSCLK_EN_SEL 0x1A 0
USB3_DP_QSERDES_COM_LOCK_CMP_EN 0x04 0
USB3_DP_QSERDES_COM_LOCK_CMP1_MODE0 0x14 0
USB3_DP_QSERDES_COM_LOCK_CMP2_MODE0 0x34 0
USB3_DP_QSERDES_COM_LOCK_CMP1_MODE1 0x34 0
USB3_DP_QSERDES_COM_LOCK_CMP2_MODE1 0x82 0
USB3_DP_QSERDES_COM_DEC_START_MODE0 0x82 0
USB3_DP_QSERDES_COM_DEC_START_MODE1 0x82 0
USB3_DP_QSERDES_COM_DIV_FRAC_START1_MODE0 0xAB 0
USB3_DP_QSERDES_COM_DIV_FRAC_START2_MODE0 0xEA 0
USB3_DP_QSERDES_COM_DIV_FRAC_START3_MODE0 0x02 0
USB3_DP_QSERDES_COM_DIV_FRAC_START1_MODE1 0xAB 0
USB3_DP_QSERDES_COM_DIV_FRAC_START2_MODE1 0xEA 0
USB3_DP_QSERDES_COM_DIV_FRAC_START3_MODE1 0x02 0
USB3_DP_QSERDES_COM_VCO_TUNE_MAP 0x02 0
USB3_DP_QSERDES_COM_VCO_TUNE1_MODE0 0x24 0
USB3_DP_QSERDES_COM_VCO_TUNE1_MODE1 0x24 0
USB3_DP_QSERDES_COM_VCO_TUNE2_MODE1 0x02 0
USB3_DP_QSERDES_COM_HSCLK_SEL 0x01 0
USB3_DP_QSERDES_COM_CORECLK_DIV_MODE1 0x08 0
USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE0 0xCA 0
USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE0 0x1E 0
USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE1_MODE1 0xCA 0
USB3_DP_QSERDES_COM_BIN_VCOCAL_CMP_CODE2_MODE1 0x1E 0
USB3_DP_QSERDES_COM_BIN_VCOCAL_HSCLK_SEL 0x11 0
USB3_DP_QSERDES_TXA_RES_CODE_LANE_TX 0x60 0
USB3_DP_QSERDES_TXA_RES_CODE_LANE_RX 0x60 0
USB3_DP_QSERDES_TXA_RES_CODE_LANE_OFFSET_TX 0x11 0
USB3_DP_QSERDES_TXA_RES_CODE_LANE_OFFSET_RX 0x02 0
USB3_DP_QSERDES_TXA_LANE_MODE_1 0xD5 0
USB3_DP_QSERDES_TXA_LANE_MODE_2 0x00 0
USB3_DP_QSERDES_TXA_RCV_DETECT_LVL_2 0x12 0
USB3_DP_QSERDES_TXA_PI_QEC_CTRL 0x40 0
USB3_DP_QSERDES_RXA_UCDR_FO_GAIN 0x09 0
USB3_DP_QSERDES_RXA_UCDR_SO_GAIN 0x05 0
USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_FO_GAIN 0x2F 0
USB3_DP_QSERDES_RXA_UCDR_SO_SATURATION_AND_ENABLE 0x7F 0
USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_COUNT_LOW 0xFF 0
USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_COUNT_HIGH 0x0F 0
USB3_DP_QSERDES_RXA_UCDR_PI_CONTROLS 0x99 0
USB3_DP_QSERDES_RXA_UCDR_SB2_THRESH1 0x08 0
USB3_DP_QSERDES_RXA_UCDR_SB2_THRESH2 0x08 0
USB3_DP_QSERDES_RXA_UCDR_SB2_GAIN1 0x00 0
USB3_DP_QSERDES_RXA_UCDR_SB2_GAIN2 0x04 0
USB3_DP_QSERDES_RXA_VGA_CAL_CNTRL1 0x54 0
USB3_DP_QSERDES_RXA_VGA_CAL_CNTRL2 0x0C 0
USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL2 0x0F 0
USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL3 0x4A 0
USB3_DP_QSERDES_RXA_RX_EQU_ADAPTOR_CNTRL4 0x0A 0
USB3_DP_QSERDES_RXA_RX_IDAC_TSETTLE_LOW 0xC0 0
USB3_DP_QSERDES_RXA_RX_IDAC_TSETTLE_HIGH 0x00 0
USB3_DP_QSERDES_RXA_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0
USB3_DP_QSERDES_RXA_SIGDET_CNTRL 0x04 0
USB3_DP_QSERDES_RXA_SIGDET_DEGLITCH_CNTRL 0x0E 0
USB3_DP_QSERDES_RXA_RX_MODE_00_LOW 0xFF 0
USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH 0x7F 0
USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH2 0x7F 0
USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH3 0x7F 0
USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH4 0x97 0
USB3_DP_QSERDES_RXA_RX_MODE_01_LOW 0xDC 0
USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH 0xDC 0
USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH2 0x5C 0
USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH3 0x7B 0
USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH4 0xB4 0
USB3_DP_QSERDES_RXA_DFE_EN_TIMER 0x04 0
USB3_DP_QSERDES_RXA_DFE_CTLE_POST_CAL_OFFSET 0x38 0
USB3_DP_QSERDES_RXA_AUX_DATA_TCOARSE_TFINE 0xA0 0
USB3_DP_QSERDES_RXA_DCC_CTRL1 0x0C 0
USB3_DP_QSERDES_RXA_GM_CAL 0x1F 0
USB3_DP_QSERDES_RXA_VTH_CODE 0x10 0
USB3_DP_QSERDES_TXB_RES_CODE_LANE_TX 0x60 0
USB3_DP_QSERDES_TXB_RES_CODE_LANE_RX 0x60 0
USB3_DP_QSERDES_TXB_RES_CODE_LANE_OFFSET_TX 0x11 0
USB3_DP_QSERDES_TXB_RES_CODE_LANE_OFFSET_RX 0x02 0
USB3_DP_QSERDES_TXB_LANE_MODE_1 0xD5 0
USB3_DP_QSERDES_TXB_LANE_MODE_2 0x00 0
USB3_DP_QSERDES_TXB_RCV_DETECT_LVL_2 0x12 0
USB3_DP_QSERDES_TXB_PI_QEC_CTRL 0x54 0
USB3_DP_QSERDES_RXB_UCDR_FO_GAIN 0x09 0
USB3_DP_QSERDES_RXB_UCDR_SO_GAIN 0x05 0
USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_FO_GAIN 0x2F 0
USB3_DP_QSERDES_RXB_UCDR_SO_SATURATION_AND_ENABLE 0x7F 0
USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_COUNT_LOW 0xFF 0
USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_COUNT_HIGH 0x0F 0
USB3_DP_QSERDES_RXB_UCDR_PI_CONTROLS 0x99 0
USB3_DP_QSERDES_RXB_UCDR_SB2_THRESH1 0x08 0
USB3_DP_QSERDES_RXB_UCDR_SB2_THRESH2 0x08 0
USB3_DP_QSERDES_RXB_UCDR_SB2_GAIN1 0x00 0
USB3_DP_QSERDES_RXB_UCDR_SB2_GAIN2 0x04 0
USB3_DP_QSERDES_RXB_VGA_CAL_CNTRL1 0x54 0
USB3_DP_QSERDES_RXB_VGA_CAL_CNTRL2 0x0C 0
USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL2 0x0F 0
USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL3 0x4A 0
USB3_DP_QSERDES_RXB_RX_EQU_ADAPTOR_CNTRL4 0x0A 0
USB3_DP_QSERDES_RXB_RX_IDAC_TSETTLE_LOW 0xC0 0
USB3_DP_QSERDES_RXB_RX_IDAC_TSETTLE_HIGH 0x00 0
USB3_DP_QSERDES_RXB_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0
USB3_DP_QSERDES_RXB_SIGDET_CNTRL 0x04 0
USB3_DP_QSERDES_RXB_SIGDET_DEGLITCH_CNTRL 0x0E 0
USB3_DP_QSERDES_RXB_RX_MODE_00_LOW 0x7F 0
USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH 0xFF 0
USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH2 0x3F 0
USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH3 0x7F 0
USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH4 0xA6 0
USB3_DP_QSERDES_RXB_RX_MODE_01_LOW 0xDC 0
USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH 0xDC 0
USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH2 0x5C 0
USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH3 0x7B 0
USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH4 0xB4 0
USB3_DP_QSERDES_RXB_DFE_EN_TIMER 0x04 0
USB3_DP_QSERDES_RXB_DFE_CTLE_POST_CAL_OFFSET 0x38 0
USB3_DP_QSERDES_RXB_AUX_DATA_TCOARSE_TFINE 0xA0 0
USB3_DP_QSERDES_RXB_DCC_CTRL1 0x0C 0
USB3_DP_QSERDES_RXB_GM_CAL 0x1F 0
USB3_DP_QSERDES_RXB_VTH_CODE 0x10 0
USB3_DP_PCS_LOCK_DETECT_CONFIG1 0xD0 0
USB3_DP_PCS_LOCK_DETECT_CONFIG2 0x07 0
USB3_DP_PCS_LOCK_DETECT_CONFIG3 0x20 0
USB3_DP_PCS_LOCK_DETECT_CONFIG6 0x13 0
USB3_DP_PCS_REFGEN_REQ_CONFIG1 0x21 0
USB3_DP_PCS_RX_SIGDET_LVL 0xA9 0
USB3_DP_PCS_CDR_RESET_TIME 0x0A 0
USB3_DP_PCS_ALIGN_DETECT_CONFIG1 0x88 0
USB3_DP_PCS_ALIGN_DETECT_CONFIG2 0x13 0
USB3_DP_PCS_PCS_TX_RX_CONFIG 0x0C 0
USB3_DP_PCS_EQ_CONFIG1 0x4B 0
USB3_DP_PCS_EQ_CONFIG5 0x10 0
USB3_DP_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0xF8 0
USB3_DP_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x07 0
0xffffffff 0xffffffff 0x00>;
};
usb_nop_phy: usb_nop_phy {
compatible = "usb-nop-xceiv";
};
usb_audio_qmi_dev {
compatible = "qcom,usb-audio-qmi-dev";
iommus = <&apps_smmu 0x1cf 0x0>;
qcom,iommu-dma = "disabled";
qcom,usb-audio-stream-id = <0xf>;
qcom,usb-audio-intr-num = <2>;
};
};

9
qcom/khaje.dts Normal file
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/dts-v1/;
#include "khaje.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Khaje SoC";
compatible = "qcom,khaje";
qcom,board-id = <0 0>;
};

3758
qcom/khaje.dtsi Normal file
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161
qcom/msm-arm-smmu-bengal.dtsi Normal file
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#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
apps_smmu: apps-smmu@0xc600000 {
status = "okay";
compatible = "qcom,qsmmu-v500";
reg = <0xc600000 0x80000>,
<0xc782000 0x20>;
reg-names = "base", "tcu-base";
#iommu-cells = <2>;
qcom,skip-init;
qcom,use-3-lvl-tables;
#global-interrupts = <1>;
#size-cells = <1>;
#address-cells = <1>;
ranges;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
qcom,active-only;
qcom,actlr =
/* For rt TBU +3 deep PF */
<0x400 0x3ff 0x103>,
/* For nrt TBU +3 deep PF */
<0x800 0x3ff 0x103>;
anoc_1_tbu: anoc_1_tbu@0xc785000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0xc785000 0x1000>,
<0xc782200 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x0 0x400>;
qcom,active-only;
qcom,iova-width = <36>;
};
mm_rt_tbu: mm_rt_tbu@0xc789000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0xc789000 0x1000>,
<0xc782208 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x400 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc>;
qcom,active-only;
qcom,iova-width = <36>;
};
mm_nrt_tbu: mm_nrt_tbu@0xc78d000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0xc78d000 0x1000>,
<0xc782210 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0x800 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc>;
qcom,active-only;
qcom,iova-width = <32>;
};
cdsp_tbu: cdsp_tbu@0xc791000 {
compatible = "qcom,qsmmuv500-tbu";
reg = <0xc791000 0x1000>,
<0xc782218 0x8>;
reg-names = "base", "status-reg";
qcom,stream-id-range = <0xc00 0x400>;
qcom,regulator-names = "vdd";
vdd-supply = <&hlos1_vote_turing_mmu_tbu0_gdsc>;
qcom,active-only;
qcom,iova-width = <32>;
};
};
dma_dev {
compatible = "qcom,iommu-dma";
memory-region = <&system_cma>;
};
apps_iommu_test_device {
compatible = "iommu-debug-test";
qcom,iommu-dma = "disabled";
iommus = <&apps_smmu 0x1e0 0>;
};
apps_iommu_coherent_test_device {
compatible = "iommu-debug-test";
qcom,iommu-dma = "disabled";
iommus = <&apps_smmu 0x1e1 0>;
dma-coherent;
};
};

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qcom/pm6125-rpm-regulator.dtsi Normal file
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&rpm_bus {
/* VDD_APC supply */
rpm-regulator-smpa1 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "rwmx";
qcom,resource-id = <0>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s1 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s1";
qcom,set = <3>;
status = "disabled";
};
};
/* VDD_CX */
rpm-regulator-smpa3 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "rwcx";
qcom,resource-id = <0>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s3 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s3";
qcom,set = <3>;
status = "disabled";
};
};
/* VDD_MX */
rpm-regulator-smpa5 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "rwmx";
qcom,resource-id = <0>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s5 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s5";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-smpa6 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <6>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s6 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s6";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-smpa7 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <7>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s7 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s7";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-smpa8 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "smpa";
qcom,resource-id = <8>;
qcom,regulator-type = <1>;
qcom,hpm-min-load = <100000>;
status = "disabled";
regulator-s8 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_s8";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa1 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <1>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l1 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l1";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa2 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <2>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l2 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l2";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa3 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <3>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l3 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l3";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa4 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <4>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l4 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l4";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa5 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <5>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l5 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l5";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa6 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <6>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l6 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l6";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa7 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <7>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l7 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l7";
qcom,set = <3>;
status = "disabled";
};
};
/* VDD_WCSS_CX */
rpm-regulator-ldoa8 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <8>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l8 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l8";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa9 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <9>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l9 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l9";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa10 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <10>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l10 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l10";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa11 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <11>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l11 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l11";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa12 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <12>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l12 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l12";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa13 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <13>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l13 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l13";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa14 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <14>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l14 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l14";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa15 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <15>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l15 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l15";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa16 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <16>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l16 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l16";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa17 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <17>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l17 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l17";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa18 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <18>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l18 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l18";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa19 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <19>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l19 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l19";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa20 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <20>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l20 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l20";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa21 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <21>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l21 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l21";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa22 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <22>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l22 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l22";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa23 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <23>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l23 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l23";
qcom,set = <3>;
status = "disabled";
};
};
rpm-regulator-ldoa24 {
compatible = "qcom,rpm-smd-regulator-resource";
qcom,resource-name = "ldoa";
qcom,resource-id = <24>;
qcom,regulator-type = <0>;
qcom,regulator-hw-type = "pmic5-ldo";
qcom,hpm-min-load = <10000>;
status = "disabled";
regulator-l24 {
compatible = "qcom,rpm-smd-regulator";
regulator-name = "pm6125_l24";
qcom,set = <3>;
status = "disabled";
};
};
};

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#include <dt-bindings/input/input.h>
#include <dt-bindings/input/qcom,qpnp-power-on.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
&spmi_bus {
qcom,pm6125@0 {
compatible = "qcom,spmi-pmic";
reg = <0x0 0x0>;
#address-cells = <2>;
#size-cells = <0>;
pm6125_revid: qcom,revid@100 {
compatible = "qcom,qpnp-revid";
reg = <0x100 0x100>;
};
qcom,power-on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800 0x100>;
interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "kpdpwr", "resin";
qcom,pon-dbc-delay = <15625>;
qcom,kpdpwr-sw-debounce;
qcom,system-reset;
qcom,store-hard-reset-reason;
qcom,pon_1 {
qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>;
qcom,pull-up = <1>;
linux,code = <KEY_POWER>;
};
qcom,pon_2 {
qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>;
qcom,pull-up = <1>;
linux,code = <KEY_VOLUMEDOWN>;
};
};
pm6125_vadc: vadc@3100 {
compatible = "qcom,spmi-adc5";
reg = <0x3100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "eoc-int-en-set";
qcom,adc-vdd-reference = <1875>;
#io-channel-cells = <1>;
io-channel-ranges;
/* Channel nodes */
ref_gnd {
reg = <ADC5_REF_GND>;
label = "ref_gnd";
qcom,pre-scaling = <1 1>;
};
vref_1p25 {
reg = <ADC5_1P25VREF>;
label = "vref_1p25";
qcom,pre-scaling = <1 1>;
};
die_temp {
reg = <ADC5_DIE_TEMP>;
label = "die_temp";
qcom,pre-scaling = <1 1>;
};
vph_pwr {
reg = <ADC5_VPH_PWR>;
label = "vph_pwr";
qcom,pre-scaling = <1 3>;
};
vcoin {
reg = <ADC5_VCOIN>;
label = "vcoin";
qcom,pre-scaling = <1 3>;
};
xo_therm {
reg = <ADC5_XO_THERM_100K_PU>;
label = "xo_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
};
pm6125_adc_tm: adc_tm@3500 {
compatible = "qcom,adc-tm5";
reg = <0x3500 0x100>;
interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "thr-int-en";
#address-cells = <1>;
#size-cells = <0>;
#thermal-sensor-cells = <1>;
};
pm6125_tz: qcom,temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400 0x100>;
interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
qcom,temperature-threshold-set = <1>;
};
pm6125_clkdiv: clock-controller@5b00 {
compatible = "qcom,spmi-clkdiv";
reg = <0x5b00 0x100>;
#clock-cells = <1>;
qcom,num-clkdivs = <1>;
clock-output-names = "pm6125_div_clk1";
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "xo";
assigned-clocks = <&pm6125_clkdiv 1>;
assigned-clock-rates = <9600000>;
};
pm6125_gpios: pinctrl@c000 {
compatible = "qcom,spmi-gpio";
reg = <0xc000 0x900>;
interrupts = <0x0 0xc0 0 IRQ_TYPE_NONE>,
<0x0 0xc1 0 IRQ_TYPE_NONE>,
<0x0 0xc2 0 IRQ_TYPE_NONE>,
<0x0 0xc3 0 IRQ_TYPE_NONE>,
<0x0 0xc4 0 IRQ_TYPE_NONE>,
<0x0 0xc5 0 IRQ_TYPE_NONE>,
<0x0 0xc6 0 IRQ_TYPE_NONE>,
<0x0 0xc7 0 IRQ_TYPE_NONE>,
<0x0 0xc8 0 IRQ_TYPE_NONE>;
interrupt-names = "pm6125_gpio1", "pm6125_gpio2",
"pm6125_gpio3", "pm6125_gpio4",
"pm6125_gpio5", "pm6125_gpio6",
"pm6125_gpio7", "pm6125_gpio8",
"pm6125_gpio9";
gpio-controller;
#gpio-cells = <2>;
};
pm6125_rtc: qcom,pm6125_rtc {
compatible = "qcom,pm8941-rtc";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};
};
qcom,pm6125@1 {
compatible ="qcom,spmi-pmic";
reg = <0x1 0x0>;
#address-cells = <2>;
#size-cells = <0>;
pm6125_pwm: qcom,pwms@b300 {
status = "disabled";
compatible = "qcom,pwm-lpg";
reg = <0xb300 0x100>;
reg-names = "lpg-base";
qcom,num-lpg-channels = <1>;
#pwm-cells = <2>;
};
};
};
&thermal_zones {
pm6125-tz {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm6125_tz>;
wake-capable-sensor;
trips {
pm6125_trip0: trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
pm6125_trip1: trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "passive";
};
trip2 {
temperature = <145000>;
hysteresis = <0>;
type = "passive";
};
};
};
};

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#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
&spmi_bus {
#address-cells = <2>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <4>;
qcom,pm7250b@2 {
compatible = "qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
pm7250b_revid: qcom,revid@100 {
compatible = "qcom,qpnp-revid";
reg = <0x100 0x100>;
};
pm7250b_pon: qcom,power-on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800 0x100>;
};
pm7250b_charger: qcom,qpnp-smb5 {
compatible = "qcom,qpnp-smb5";
#address-cells = <1>;
#size-cells = <1>;
#cooling-cells = <2>;
qcom,thermal-mitigation = <5400000 4500000 4000000
3500000 3000000 2500000 2000000 1500000
1000000 500000>;
qcom,pmic-revid = <&pm7250b_revid>;
qcom,hvdcp2-max-icl-ua = <2000000>;
qcom,hvdcp2-12v-max-icl-ua = <1500000>;
qcom,chgr@1000 {
reg = <0x1000 0x100>;
interrupts =
<0x2 0x10 0x0 IRQ_TYPE_EDGE_RISING>,
<0x2 0x10 0x1 IRQ_TYPE_EDGE_RISING>,
<0x2 0x10 0x2 IRQ_TYPE_EDGE_RISING>,
<0x2 0x10 0x3 IRQ_TYPE_EDGE_RISING>,
<0x2 0x10 0x4 IRQ_TYPE_EDGE_RISING>,
<0x2 0x10 0x5 IRQ_TYPE_EDGE_RISING>,
<0x2 0x10 0x6 IRQ_TYPE_EDGE_RISING>,
<0x2 0x10 0x7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "chgr-error",
"chg-state-change",
"step-chg-state-change",
"step-chg-soc-update-fail",
"step-chg-soc-update-req",
"fg-fvcal-qualified",
"vph-alarm",
"vph-drop-prechg";
};
qcom,dcdc@1100 {
reg = <0x1100 0x100>;
interrupts =
<0x2 0x11 0x0 IRQ_TYPE_EDGE_RISING>,
<0x2 0x11 0x1 IRQ_TYPE_EDGE_RISING>,
<0x2 0x11 0x2 IRQ_TYPE_EDGE_RISING>,
<0x2 0x11 0x3 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x11 0x4 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x11 0x5 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x11 0x6 IRQ_TYPE_EDGE_RISING>,
<0x2 0x11 0x7 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "otg-fail",
"otg-oc-disable-sw",
"otg-oc-hiccup",
"bsm-active",
"high-duty-cycle",
"input-current-limiting",
"concurrent-mode-disable",
"switcher-power-ok";
};
qcom,batif@1200 {
reg = <0x1200 0x100>;
interrupts =
<0x2 0x12 0x0 IRQ_TYPE_EDGE_RISING>,
<0x2 0x12 0x2 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x12 0x3 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x12 0x4 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x12 0x5 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x12 0x6 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "bat-temp",
"bat-ov",
"bat-low",
"bat-therm-or-id-missing",
"bat-terminal-missing",
"buck-oc",
"vph-ov";
};
qcom,usb@1300 {
reg = <0x1300 0x100>;
interrupts =
<0x2 0x13 0x0 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x13 0x1 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x13 0x2 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x13 0x3 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x13 0x4 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x13 0x5 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x13 0x6 IRQ_TYPE_EDGE_RISING>,
<0x2 0x13 0x7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "usbin-collapse",
"usbin-vashdn",
"usbin-uv",
"usbin-ov",
"usbin-plugin",
"usbin-revi-change",
"usbin-src-change",
"usbin-icl-change";
};
qcom,dc@1400 {
reg = <0x1400 0x100>;
interrupts =
<0x2 0x14 0x1 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x14 0x2 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x14 0x3 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x14 0x4 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x14 0x5 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x14 0x6 IRQ_TYPE_EDGE_RISING>,
<0x2 0x14 0x7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "dcin-vashdn",
"dcin-uv",
"dcin-ov",
"dcin-plugin",
"dcin-revi",
"dcin-pon",
"dcin-en";
};
qcom,typec@1500 {
reg = <0x1500 0x100>;
interrupts =
<0x2 0x15 0x0 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x1 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x2 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x3 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x4 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x5 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x6 IRQ_TYPE_EDGE_RISING>,
<0x2 0x15 0x7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "typec-or-rid-detect-change",
"typec-vpd-detect",
"typec-cc-state-change",
"typec-vconn-oc",
"typec-vbus-change",
"typec-attach-detach",
"typec-legacy-cable-detect",
"typec-try-snk-src-detect";
};
qcom,misc@1600 {
reg = <0x1600 0x100>;
interrupts =
<0x2 0x16 0x0 IRQ_TYPE_EDGE_RISING>,
<0x2 0x16 0x1 IRQ_TYPE_EDGE_RISING>,
<0x2 0x16 0x2 IRQ_TYPE_EDGE_RISING>,
<0x2 0x16 0x3 IRQ_TYPE_EDGE_RISING>,
<0x2 0x16 0x4 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x16 0x5 IRQ_TYPE_EDGE_RISING>,
<0x2 0x16 0x6 IRQ_TYPE_EDGE_RISING>,
<0x2 0x16 0x7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog-snarl",
"wdog-bark",
"aicl-fail",
"aicl-done",
"smb-en",
"imp-trigger",
"temp-change",
"temp-change-smb";
};
qcom,chg-sdam@b000 {
reg = <0xb000 0x100>;
};
};
pm7250b_pdphy: qcom,usb-pdphy@1700 {
compatible = "qcom,qpnp-pdphy";
reg = <0x1700 0x100>;
interrupts = <0x2 0x17 0x0 IRQ_TYPE_EDGE_RISING>,
<0x2 0x17 0x1 IRQ_TYPE_EDGE_RISING>,
<0x2 0x17 0x2 IRQ_TYPE_EDGE_RISING>,
<0x2 0x17 0x3 IRQ_TYPE_EDGE_RISING>,
<0x2 0x17 0x4 IRQ_TYPE_EDGE_RISING>,
<0x2 0x17 0x5 IRQ_TYPE_EDGE_RISING>,
<0x2 0x17 0x6 IRQ_TYPE_EDGE_RISING>,
<0x2 0x17 0x7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "sig-tx",
"sig-rx",
"msg-tx",
"msg-rx",
"msg-tx-failed",
"msg-tx-discarded",
"msg-rx-discarded",
"fr-swap";
qcom,default-sink-caps = <5000 3000>, /* 5V @ 3A */
<9000 3000>, /* 9V @ 3A */
<12000 2250>; /* 12V @ 2.25A */
};
pm7250b_tz: qcom,temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400 0x100>;
interrupts = <0x2 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
io-channels = <&pm7250b_vadc ADC5_DIE_TEMP>;
io-channel-names = "thermal";
#thermal-sensor-cells = <0>;
qcom,temperature-threshold-set = <1>;
};
pm7250b_qg: qpnp,qg {
compatible = "qcom,qpnp-qg";
#address-cells = <1>;
#size-cells = <1>;
qcom,vbatt-cutoff-mv = <3200>;
qcom,vbatt-low-mv = <3300>;
qcom,vbatt-low-cold-mv = <3700>;
qcom,vbatt-empty-mv = <3000>;
qcom,vbatt-empty-cold-mv = <3000>;
qcom,s3-entry-fifo-length = <2>;
qcom,pmic-revid = <&pm7250b_revid>;
qcom,qgauge@4800 {
status = "okay";
reg = <0x4800 0x100>;
interrupts =
<0x2 0x48 0x0 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x48 0x1 IRQ_TYPE_EDGE_BOTH>,
<0x2 0x48 0x2 IRQ_TYPE_EDGE_RISING>,
<0x2 0x48 0x3 IRQ_TYPE_EDGE_RISING>,
<0x2 0x48 0x4 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "qg-batt-missing",
"qg-vbat-low",
"qg-vbat-empty",
"qg-fifo-done",
"qg-good-ocv";
};
qcom,qg-sdam@b100 {
status = "okay";
reg = <0xb100 0x100>;
};
};
pm7250b_clkdiv: clock-controller@5b00 {
compatible = "qcom,spmi-clkdiv";
reg = <0x5b00 0x100>;
#clock-cells = <1>;
qcom,num-clkdivs = <1>;
clock-output-names = "pm7250b_div_clk1";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
assigned-clocks = <&pm7250b_clkdiv 1>;
assigned-clock-rates = <19200000>;
};
pm7250b_gpios: pinctrl@c000 {
compatible = "qcom,spmi-gpio";
reg = <0xc000 0xc00>;
interrupts = <0x2 0xc0 0x0 IRQ_TYPE_NONE>,
<0x2 0xc1 0x0 IRQ_TYPE_NONE>,
<0x2 0xc2 0x0 IRQ_TYPE_NONE>,
<0x2 0xc3 0x0 IRQ_TYPE_NONE>,
<0x2 0xc4 0x0 IRQ_TYPE_NONE>,
<0x2 0xc5 0x0 IRQ_TYPE_NONE>,
<0x2 0xc6 0x0 IRQ_TYPE_NONE>,
<0x2 0xc7 0x0 IRQ_TYPE_NONE>,
<0x2 0xc8 0x0 IRQ_TYPE_NONE>,
<0x2 0xc9 0x0 IRQ_TYPE_NONE>,
<0x2 0xca 0x0 IRQ_TYPE_NONE>,
<0x2 0xcb 0x0 IRQ_TYPE_NONE>;
interrupt-names = "pm7250b_gpio1", "pm7250b_gpio2",
"pm7250b_gpio3", "pm7250b_gpio4",
"pm7250b_gpio5", "pm7250b_gpio6",
"pm7250b_gpio7", "pm7250b_gpio8",
"pm7250b_gpio9", "pm7250b_gpio10",
"pm7250b_gpio11", "pm7250b_gpio12";
gpio-controller;
#gpio-cells = <2>;
};
pm7250b_vadc: vadc@3100 {
compatible = "qcom,spmi-adc5";
reg = <0x3100 0x100>;
reg-names = "adc5-usr-base";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "eoc-int-en-set";
qcom,adc-vdd-reference = <1875>;
#io-channel-cells = <1>;
io-channel-ranges;
/* Channel node */
ref_gnd@0 {
reg = <ADC5_REF_GND>;
label = "ref_gnd";
qcom,pre-scaling = <1 1>;
};
vref_1p25@1 {
reg = <ADC5_1P25VREF>;
label = "vref_1p25";
qcom,pre-scaling = <1 1>;
};
die_temp@2 {
reg = <ADC5_DIE_TEMP>;
label = "die_temp";
qcom,pre-scaling = <1 1>;
};
vph_pwr@83 {
reg = <ADC5_VPH_PWR>;
label = "vph_pwr";
qcom,pre-scaling = <1 3>;
};
vbat_sns@84 {
reg = <ADC5_VBAT_SNS>;
label = "vbat_sns";
qcom,pre-scaling = <1 3>;
};
usb_in_i_uv@7 {
reg = <ADC5_USB_IN_I>;
label = "usb_in_i_uv";
qcom,pre-scaling = <1 1>;
};
usb_in_v_div_16@8 {
reg = <ADC5_USB_IN_V_16>;
label = "usb_in_v_div_16";
qcom,pre-scaling = <1 16>;
};
chg_temp@9 {
reg = <ADC5_CHG_TEMP>;
label = "chg_temp";
qcom,pre-scaling = <1 1>;
};
bat_therm@4a {
reg = <ADC5_BAT_THERM_100K_PU>;
label = "bat_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
bat_therm_30k@2a {
reg = <ADC5_BAT_THERM_30K_PU>;
label = "bat_therm_30k";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
bat_therm_400k@6a {
reg = <ADC5_BAT_THERM_400K_PU>;
label = "bat_therm_400k";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
bat_id@4b {
reg = <ADC5_BAT_THERM_100K_PU>;
label = "bat_id";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
smb1390_therm@e {
reg = <ADC5_AMUX_THM2>;
label = "smb1390_therm";
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
chg_sbux@99 {
reg = <ADC5_SBUx>;
label = "chg_sbux";
qcom,pre-scaling = <1 3>;
};
mid_chg_div6@1e {
reg = <ADC5_MID_CHG_DIV6>;
label = "chg_mid";
qcom,pre-scaling = <1 6>;
};
v_i_int_ext@b0 {
reg = <ADC5_INT_EXT_ISENSE_VBAT_VDATA>;
label = "v_i_int_vbat_vdata";
qcom,pre-scaling = <1 1>;
};
v_i_parallel@b0 {
reg = <ADC5_PARALLEL_ISENSE_VBAT_VDATA>;
label = "v_i_parallel_vbat_vdata";
qcom,pre-scaling = <1 1>;
};
};
pm7250b_adc_tm: adc_tm@3500 {
compatible = "qcom,adc-tm5";
reg = <0x3500 0x100>;
interrupts = <0x2 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "thr-int-en";
#address-cells = <1>;
#size-cells = <0>;
#thermal-sensor-cells = <1>;
};
pm7250b_bcl: bcl@1d00 {
compatible = "qcom,bcl-v5";
reg = <0x1d00 0x100>;
interrupts = <0x2 0x1d 0x0 IRQ_TYPE_NONE>,
<0x2 0x1d 0x1 IRQ_TYPE_NONE>,
<0x2 0x1d 0x2 IRQ_TYPE_NONE>;
interrupt-names = "bcl-lvl0",
"bcl-lvl1",
"bcl-lvl2";
#thermal-sensor-cells = <1>;
};
bcl_soc:bcl-soc {
compatible = "qcom,msm-bcl-soc";
#thermal-sensor-cells = <0>;
};
};
qcom,pm7250b@3 {
compatible = "qcom,spmi-pmic";
reg = <0x3 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
pm7250b_vib: qcom,vibrator@5300 {
compatible = "qcom,qpnp-vibrator-ldo";
reg = <0x5300 0x100>;
qcom,vib-ldo-volt-uv = <3000000>;
qcom,disable-overdrive;
};
};
};
&thermal_zones {
pm7250b_temp_alarm: pm7250b-tz {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm7250b_tz>;
wake-capable-sensor;
trips {
pm7250b_trip0: trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
pm7250b_trip1: trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "passive";
};
trip2 {
temperature = <145000>;
hysteresis = <0>;
type = "passive";
};
};
};
pm7250b-ibat-lvl0 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm7250b_bcl 0>;
wake-capable-sensor;
trips {
ibat_lvl0:ibat-lvl0 {
temperature = <5500>;
hysteresis = <200>;
type = "passive";
};
};
};
pm7250b-ibat-lvl1 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm7250b_bcl 1>;
wake-capable-sensor;
trips {
ibat_lvl1:ibat-lvl1 {
temperature = <6000>;
hysteresis = <200>;
type = "passive";
};
};
};
pm7250b-vbat-lvl0 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "low_limits_cap";
thermal-sensors = <&pm7250b_bcl 2>;
wake-capable-sensor;
tracks-low;
trips {
vbat_lvl0: vbat-lvl0 {
temperature = <3000>;
hysteresis = <200>;
type = "passive";
};
};
};
pm7250b-vbat-lvl1 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "low_limits_cap";
thermal-sensors = <&pm7250b_bcl 3>;
wake-capable-sensor;
tracks-low;
trips {
vbat_lvl1:vbat-lvl1 {
temperature = <2800>;
hysteresis = <200>;
type = "passive";
};
};
};
pm7250b-vbat-lvl2 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-governor = "low_limits_cap";
thermal-sensors = <&pm7250b_bcl 4>;
wake-capable-sensor;
tracks-low;
trips {
vbat_lvl2:vbat-lvl2 {
temperature = <2600>;
hysteresis = <200>;
type = "passive";
};
};
};
pm7250b-bcl-lvl0 {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm7250b_bcl 5>;
wake-capable-sensor;
trips {
b_bcl_lvl0: b-bcl-lvl0 {
temperature = <1>;
hysteresis = <1>;
type = "passive";
};
};
};
pm7250b-bcl-lvl1 {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm7250b_bcl 6>;
wake-capable-sensor;
trips {
b_bcl_lvl1: b-bcl-lvl1 {
temperature = <1>;
hysteresis = <1>;
type = "passive";
};
};
};
pm7250b-bcl-lvl2 {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-governor = "step_wise";
thermal-sensors = <&pm7250b_bcl 7>;
wake-capable-sensor;
trips {
b_bcl_lvl2: b-bcl-lvl2 {
temperature = <1>;
hysteresis = <1>;
type = "passive";
};
};
};
soc {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-governor = "low_limits_cap";
thermal-sensors = <&bcl_soc>;
wake-capable-sensor;
tracks-low;
trips {
soc_trip:soc-trip {
temperature = <10>;
hysteresis = <0>;
type = "passive";
};
};
};
};

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#include <dt-bindings/interrupt-controller/irq.h>
pm8008_8: qcom,pm8008@8 {
compatible = "qcom,i2c-pmic";
reg = <0x8>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-names = "pm8008";
qcom,periph-map = <0x09 0x24 0xc0 0xc1>;
pm8008_chip: qcom,pm8008-chip@900 {
compatible = "qcom,pm8008-chip";
reg = <0x900>;
interrupts = <0x09 4 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ocp";
PM8008_EN: qcom,pm8008-chip-en {
regulator-name = "pm8008-chip-en";
};
};
qcom,revid@100 {
compatible = "qcom,qpnp-revid";
reg = <0x100>;
};
pm8008_gpios: pinctrl@c000 {
compatible = "qcom,spmi-gpio";
reg = <0xc000 0x200>;
interrupts = <0xc0 0 IRQ_TYPE_EDGE_RISING>,
<0xc1 0 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "pm8008_gpio1", "pm8008_gpio2";
gpio-controller;
#gpio-cells = <2>;
pm8008_gpio1_active: pm8008_gpio1_active {
pins = "gpio1";
function = "func1";
power-source = <1>;
output-enable;
input-disable;
bias-disable;
};
};
};
pm8008_9: qcom,pm8008@9 {
compatible = "qcom,i2c-pmic";
reg = <0x9>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pm8008_gpio1_active>;
pm8008_regulators: qcom,pm8008-regulator {
compatible = "qcom,pm8008-regulator";
pm8008_en-supply = <&PM8008_EN>;
qcom,enable-ocp-broadcast;
L1P: qcom,pm8008-l1@4000 {
reg = <0x4000>;
regulator-name = "pm8008_l1";
regulator-min-microvolt = <528000>;
regulator-max-microvolt = <1504000>;
qcom,min-dropout-voltage = <225000>;
qcom,hpm-min-load = <0>;
};
L2P: qcom,pm8008-l2@4100 {
reg = <0x4100>;
regulator-name = "pm8008_l2";
regulator-min-microvolt = <528000>;
regulator-max-microvolt = <1504000>;
qcom,min-dropout-voltage = <225000>;
qcom,hpm-min-load = <0>;
};
L3P: qcom,pm8008-l3@4200 {
reg = <0x4200>;
regulator-name = "pm8008_l3";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3400000>;
qcom,min-dropout-voltage = <200000>;
qcom,hpm-min-load = <0>;
};
L4P: qcom,pm8008-l4@4300 {
reg = <0x4300>;
regulator-name = "pm8008_l4";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3400000>;
qcom,min-dropout-voltage = <200000>;
qcom,hpm-min-load = <0>;
};
L5P: qcom,pm8008-l5@4400 {
reg = <0x4400>;
regulator-name = "pm8008_l5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3400000>;
qcom,min-dropout-voltage = <300000>;
qcom,hpm-min-load = <0>;
};
L6P: qcom,pm8008-l6@4400 {
reg = <0x4500>;
regulator-name = "pm8008_l6";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3400000>;
qcom,min-dropout-voltage = <300000>;
qcom,hpm-min-load = <0>;
};
L7P: qcom,pm8008-l7@4400 {
reg = <0x4600>;
regulator-name = "pm8008_l7";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3400000>;
qcom,min-dropout-voltage = <300000>;
qcom,hpm-min-load = <0>;
};
};
};

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#include <dt-bindings/interrupt-controller/irq.h>
smb1355: qcom,smb1355@c {
compatible = "qcom,i2c-pmic";
reg = <0xc>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&spmi_bus>;
interrupts = <0x2 0xC5 0x0 IRQ_TYPE_LEVEL_LOW>;
interrupt_names = "smb1355";
interrupt-controller;
#interrupt-cells = <3>;
qcom,periph-map = <0x10 0x12 0x13 0x16>;
status = "disabled";
smb1355_revid: qcom,revid@100 {
compatible = "qcom,qpnp-revid";
reg = <0x100 0x100>;
};
smb1355_charger: qcom,smb1355-charger@1000 {
compatible = "qcom,smb1355";
qcom,pmic-revid = <&smb1355_revid>;
reg = <0x1000 0x700>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&smb1355>;
status = "disabled";
qcom,chgr@1000 {
reg = <0x1000 0x100>;
interrupts = <0x10 0x1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "chg-state-change";
};
qcom,chgr-misc@1600 {
reg = <0x1600 0x100>;
interrupts = <0x16 0x1 IRQ_TYPE_EDGE_RISING>,
<0x16 0x6 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog-bark",
"temperature-change";
};
};
};
smb1355_0: qcom,smb1355@8 {
compatible = "qcom,i2c-pmic";
reg = <0x8>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&spmi_bus>;
interrupts = <0x0 0xd1 0x0 IRQ_TYPE_LEVEL_LOW>;
interrupt_names = "smb1355_0";
interrupt-controller;
#interrupt-cells = <3>;
qcom,periph-map = <0x10 0x12 0x13 0x16>;
status = "disabled";
smb1355_revid_0: qcom,revid@100 {
compatible = "qcom,qpnp-revid";
reg = <0x100 0x100>;
};
smb1355_charger_0: qcom,smb1355-charger@1000 {
compatible = "qcom,smb1355";
qcom,pmic-revid = <&smb1355_revid_0>;
reg = <0x1000 0x700>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&smb1355_0>;
status = "disabled";
qcom,chgr@1000 {
reg = <0x1000 0x100>;
interrupts = <0x10 0x1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "chg-state-change";
};
qcom,chgr-misc@1600 {
reg = <0x1600 0x100>;
interrupts = <0x16 0x1 IRQ_TYPE_EDGE_RISING>,
<0x16 0x6 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog-bark",
"temperature-change";
};
};
};

40
qcom/smb1394.dtsi Normal file
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#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
smb1394: qcom,smb1394@34 {
compatible = "qcom,i2c-pmic";
reg = <0x34>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-controller;
#interrupt-cells = <3>;
qcom,periph-map = <0x6 0x26 0x27>;
status = "disabled";
smb1394_revid: qcom,revid {
compatible = "qcom,qpnp-revid";
reg = <0x100>;
};
smb1394_div2_cp_primary: qcom,div2_cp_pry {
compatible = "qcom,smb1394-div2-cp-primary";
qcom,pmic-revid = <&smb1394_revid>;
#io-channel-cells = <1>;
interrupts = <0x26 0x1 IRQ_TYPE_EDGE_RISING>,
<0x26 0x3 IRQ_TYPE_EDGE_RISING>,
<0x26 0x5 IRQ_TYPE_EDGE_RISING>,
<0x26 0x7 IRQ_TYPE_EDGE_RISING>,
<0x27 0x5 IRQ_TYPE_EDGE_RISING>,
<0x27 0x6 IRQ_TYPE_EDGE_RISING>,
<0x27 0x7 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "temp-shdwn",
"div2-irev",
"usbin-uv",
"usbin-ov",
"div2-ilim",
"div2-win-uv",
"div2-win-ov";
qcom,div2-cp-min-ilim-ua = <1000000>;
status = "disabled";
};
};