Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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Merge commit '2afed6d364da227773d62141f58e24f56bef5bc0' of https://github.com/MotorolaMobilityLLC/kernel-audio-devicetree into HEAD

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* github.com:MotorolaMobilityLLC/kernel-audio-devicetree:
  ARM: dts: qcom: update micbias for AMIC's for aatc variant.
  audio :dts: crow: remove swrm haptics unsupported flag
  ARM: dts: qcom: enable HDMI feature for crow qrd
  audio :dts: crow: remove swrm haptics unsupported flag
  audio: dts: crow: remove 2s wsa bat cnfg node
  arm: dts: msm: Enable DP audio on crow harmonium variants
  dts: crow: update swr-port-mapping for crow
  dtsi: add support enable bt on crow.
  arm: dts: msm: Enable DP audio on crow harmonium variants
  dts: crow: update swr-port-mapping for crow
  arm: dts: msm: add board id for crow idps variant
  dtsi: add support enable bt on crow.
  ARM: dts: qcom: enable swr-haptics for kalama-hdk platform
  ARM: dts: msm: Remove unsupported routes
  arm: dts: msm: add board id for crow idps variant
  audio: dts: crow: Remove unsupported routes
  ARM: dts: qcom: kalama-apq device variant DT support
  audio-dt : add aatc support for crow qrd
  audio-dt: update audio dtsi for crow.
  dts: add new devicetree for crow targets
  ARM: dts: msm: add support for Kalama QCS, QCM soc
  dts: kalama: add SOC ID for IOT and disable swr-haptics
  dts: kalama: add SOC ID for IOT

Change-Id: Ia6012d428585d3350093e6ad190c54c691b0d60d
This commit is contained in:
Bruno Martins
2024-04-22 21:44:32 +01:00
parent a63c221bc8 2afed6d364
commit 60a5de213f
29 changed files with 4818 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
qcom/audio/Kbuild
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@@ -5,8 +5,10 @@ dtbo-y += kalama-audio.dtbo \
kalama-audio-cdp.dtbo \
kalama-audio-cdp-nfc.dtbo \
kalama-audio-wsa883x-cdp.dtbo \
kalama-audio-cdp-apq.dtbo \
kalama-audio-mtp.dtbo \
kalama-audio-mtp-nfc.dtbo \
kalama-audio-mtp-apq.dtbo \
kalama-audio-qrd.dtbo \
kalama-audio-atp.dtbo \
kalama-audio-rcm.dtbo \
@@ -30,6 +32,16 @@ dtbo-y += khaje-audio.dtbo \
khaje-nowcd.dtbo
endif
ifeq ($(CONFIG_ARCH_CROW), y)
dtbo-y += crow-audio.dtbo \
crow-audio-idp.dtbo \
crow-audio-idp-wcd9395-aatc.dtbo \
crow-audio-idp-wcd9395-dmic.dtbo \
crow-audio-idp-wcd9395-wcd-dmic.dtbo \
crow-audio-qrd.dtbo \
crow-audio-atp.dtbo
endif
always-y := $(dtb-y) $(dtbo-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

11
qcom/audio/crow-audio-atp.dts Normal file
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@@ -0,0 +1,11 @@
/dts-v1/;
/plugin/;
#include "crow-audio-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Crow ATP";
compatible = "qcom,crow-atp", "qcom,crow", "qcom,atp";
qcom,msm-id = <608 0x10000>;
qcom,board-id = <33 0>;
};

1
qcom/audio/crow-audio-atp.dtsi Normal file
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@@ -0,0 +1 @@
#include "crow-audio-idp.dtsi"

11
qcom/audio/crow-audio-idp-wcd9395-aatc.dts Normal file
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@@ -0,0 +1,11 @@
/dts-v1/;
/plugin/;
#include "crow-audio-idp-wcd9395-aatc.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Crow IDP + WCD9395 AATC";
compatible = "qcom,crow-idp", "qcom,crow", "qcom,idp";
qcom,msm-id = <608 0x10000>;
qcom,board-id = <34 3>;
};

145
qcom/audio/crow-audio-idp-wcd9395-aatc.dtsi Normal file
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@@ -0,0 +1,145 @@
#include "crow-audio-overlay.dtsi"
&tx_swr_clk_active {
config {
drive-strength = <2>;
};
};
&tx_swr_data0_active {
config {
drive-strength = <2>;
};
};
&tx_swr_data1_active {
config {
drive-strength = <2>;
};
};
&tx_swr_data2_active {
config {
drive-strength = <2>;
};
};
&wcd939x_codec {
qcom,cdc-vdd-px-lpm-supported = <1>;
/* 0 for no crosstalk, 1 for digital crosstalk, and 2 for analog crosstalk */
qcom,xtalk-config = <2>;
qcom,xtalk-r-gnd-int-fet-mohms = <200>;
qcom,xtalk-r-gnd-par-route1-mohms = <50>;
qcom,xtalk-r-gnd-par-route2-mohms = <50>;
qcom,xtalk-r-gnd-ext-fet-mohms = <650>;
qcom,xtalk-r-conn-par-load-neg-mohms = <125>;
qcom,xtalk-r-aud-int-fet-l-mohms = <200>;
qcom,xtalk-r-aud-int-fet-r-mohms = <200>;
qcom,xtalk-r-aud-ext-fet-l-mohms = <650>;
qcom,xtalk-r-aud-ext-fet-r-mohms = <650>;
qcom,xtalk-r-conn-par-load-pos-l-mohms = <7550>;
qcom,xtalk-r-conn-par-load-pos-r-mohms = <7550>;
};
&swr0 {
qcom,swr-num-dev = <2>;
wsa884x_0220: wsa884x@02170220 {
status = "okay";
};
wsa884x_0221: wsa884x@02170221 {
status = "okay";
};
wsa883x_0221: wsa883x@02170221 {
status = "disabled";
};
wsa883x_0222: wsa883x@02170222 {
status = "disabled";
};
};
&kalama_snd {
qcom,model = "crow-idp-wcd9395-aatc-snd-card";
qcom,audio-routing =
"AMIC1", "Analog Mic1",
"AMIC1", "MIC BIAS1",
"AMIC2", "Analog Mic2",
"AMIC2", "MIC BIAS2",
"AMIC3", "Analog Mic3",
"AMIC3", "MIC BIAS3",
"AMIC4", "Analog Mic4",
"AMIC4", "MIC BIAS1",
"AMIC5", "Analog Mic5",
"AMIC5", "MIC BIAS3",
"VA AMIC1", "Analog Mic1",
"VA AMIC1", "VA MIC BIAS1",
"VA AMIC2", "Analog Mic2",
"VA AMIC2", "VA MIC BIAS2",
"VA AMIC3", "Analog Mic3",
"VA AMIC3", "VA MIC BIAS3",
"VA AMIC4", "Analog Mic4",
"VA AMIC4", "VA MIC BIAS1",
"VA AMIC5", "Analog Mic5",
"VA AMIC5", "VA MIC BIAS3",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_EAR", "AUX_OUT",
"WSA SRC0_INP", "SRC0",
"WSA_TX DEC0_INP", "TX DEC0 MUX",
"WSA_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK";
asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd939x_codec>, <&wsa884x_0220>, <&wsa884x_0221>;
asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
"wcd939x_codec", "wsa-codec1", "wsa-codec2";
qcom,msm-mbhc-usbc-audio-supported = <1>;
qcom,msm-mbhc-hphl-swh = <0>;
qcom,msm-mbhc-gnd-swh = <0>;
qcom,wcd-disable-legacy-surge;
wcd939x-i2c-handle = <&wcd_usbss>;
qcom,ext-disp-audio-rx = <1>;
qcom,pri-mi2s-gpios = <&fm_i2s0_gpios>;
};
&wcd939x_codec {
status = "okay";
};
&wcd939x_tx_slave {
status = "okay";
};
&wcd939x_rx_slave {
status = "okay";
};
&wcd937x_codec {
status = "disabled";
};
&wcd937x_tx_slave {
status = "disabled";
};
&wcd937x_rx_slave {
status = "disabled";
};
&fm_i2s0_gpios {
status = "ok";
};

11
qcom/audio/crow-audio-idp-wcd9395-dmic.dts Normal file
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@@ -0,0 +1,11 @@
/dts-v1/;
/plugin/;
#include "crow-audio-idp-wcd9395-dmic.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Crow IDP + WCD9395 DMIC";
compatible = "qcom,crow-idp", "qcom,crow", "qcom,idp";
qcom,msm-id = <608 0x10000>;
qcom,board-id = <34 2>;
};

101
qcom/audio/crow-audio-idp-wcd9395-dmic.dtsi Normal file
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@@ -0,0 +1,101 @@
#include "crow-audio-overlay.dtsi"
&swr0 {
qcom,swr-num-dev = <2>;
wsa884x_0220: wsa884x@02170220 {
status = "okay";
};
wsa884x_0221: wsa884x@02170221 {
status = "okay";
};
wsa883x_0221: wsa883x@02170221 {
status = "disabled";
};
wsa883x_0222: wsa883x@02170222 {
status = "disabled";
};
};
&kalama_snd {
qcom,model = "crow-idp-wcd9395-dmic-snd-card";
qcom,audio-routing =
"AMIC2", "Analog Mic2",
"AMIC2", "MIC BIAS2",
"VA AMIC2", "Analog Mic2",
"VA AMIC2", "VA MIC BIAS2",
"TX DMIC0", "Digital Mic0",
"TX DMIC0", "MIC BIAS3",
"TX DMIC1", "Digital Mic1",
"TX DMIC1", "MIC BIAS3",
"TX DMIC2", "Digital Mic2",
"TX DMIC2", "MIC BIAS1",
"TX DMIC3", "Digital Mic3",
"TX DMIC3", "MIC BIAS1",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_EAR", "AUX_OUT",
"WSA SRC0_INP", "SRC0",
"WSA_TX DEC0_INP", "TX DEC0 MUX",
"WSA_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK",
"VA DMIC0", "Digital Mic0",
"VA DMIC1", "Digital Mic1",
"VA DMIC2", "Digital Mic2",
"VA DMIC3", "Digital Mic3",
"VA DMIC0", "VA MIC BIAS3",
"VA DMIC1", "VA MIC BIAS3",
"VA DMIC2", "VA MIC BIAS1",
"VA DMIC3", "VA MIC BIAS1";
asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd939x_codec>, <&wsa884x_0220>,
<&wsa884x_0221>;
asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
"wcd939x_codec", "wsa-codec1",
"wsa-codec2";
wcd939x-i2c-handle = <&wcd_usbss>;
qcom,ext-disp-audio-rx = <1>;
qcom,pri-mi2s-gpios = <&fm_i2s0_gpios>;
};
&wcd937x_codec {
status = "disabled";
};
&wcd937x_tx_slave {
status = "disabled";
};
&wcd937x_rx_slave {
status = "disabled";
};
&wcd939x_codec {
status = "okay";
};
&wcd939x_tx_slave {
status = "okay";
};
&wcd939x_rx_slave {
status = "okay";
};
&fm_i2s0_gpios {
status = "ok";
};

11
qcom/audio/crow-audio-idp-wcd9395-wcd-dmic.dts Normal file
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@@ -0,0 +1,11 @@
/dts-v1/;
/plugin/;
#include "crow-audio-idp-wcd9395-wcd-dmic.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Crow IDP + WCD9395 WCD-DMIC";
compatible = "qcom,crow-idp", "qcom,crow", "qcom,idp";
qcom,msm-id = <608 0x10000>;
qcom,board-id = <34 1>;
};

97
qcom/audio/crow-audio-idp-wcd9395-wcd-dmic.dtsi Normal file
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@@ -0,0 +1,97 @@
#include "crow-audio-overlay.dtsi"
&swr0 {
qcom,swr-num-dev = <2>;
wsa884x_0220: wsa884x@02170220 {
status = "okay";
};
wsa884x_0221: wsa884x@02170221 {
status = "okay";
};
wsa883x_0221: wsa883x@02170221 {
status = "disabled";
};
wsa883x_0222: wsa883x@02170222 {
status = "disabled";
};
};
&kalama_snd {
qcom,model = "crow-idp-wcd9395-wcd-dmic-snd-card";
qcom,audio-routing =
"AMIC2", "Analog Mic2",
"AMIC2", "MIC BIAS2",
"VA AMIC2", "Analog Mic2",
"VA AMIC2", "VA MIC BIAS2",
"DMIC0", "Digital Mic0",
"DMIC0", "MIC BIAS3",
"DMIC1", "Digital Mic1",
"DMIC1", "MIC BIAS3",
"DMIC2", "Digital Mic2",
"DMIC2", "MIC BIAS1",
"DMIC3", "Digital Mic3",
"DMIC3", "MIC BIAS1",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_EAR", "AUX_OUT",
"WSA SRC0_INP", "SRC0",
"WSA_TX DEC0_INP", "TX DEC0 MUX",
"WSA_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK",
"VA DMIC0", "Digital Mic0",
"VA DMIC2", "Digital Mic2",
"VA DMIC3", "Digital Mic3",
"VA DMIC0", "VA MIC BIAS3",
"VA DMIC2", "VA MIC BIAS1",
"VA DMIC3", "VA MIC BIAS1";
asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd939x_codec>, <&wsa884x_0220>, <&wsa884x_0221>;
asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
"wcd939x_codec", "wsa-codec1", "wsa-codec2";
wcd939x-i2c-handle = <&wcd_usbss>;
qcom,ext-disp-audio-rx = <1>;
qcom,pri-mi2s-gpios = <&fm_i2s0_gpios>;
};
&wcd937x_codec {
status = "disabled";
};
&wcd937x_tx_slave {
status = "disabled";
};
&wcd937x_rx_slave {
status = "disabled";
};
&wcd939x_codec {
status = "okay";
};
&wcd939x_tx_slave {
status = "okay";
};
&wcd939x_rx_slave {
status = "okay";
};
&fm_i2s0_gpios {
status = "ok";
};

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qcom/audio/crow-audio-idp.dts Normal file
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@@ -0,0 +1,11 @@
/dts-v1/;
/plugin/;
#include "crow-audio-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Crow IDP";
compatible = "qcom,crow-idp", "qcom,crow", "qcom,idp";
qcom,msm-id = <608 0x10000>;
qcom,board-id = <34 0>,<34 4>;
};

14
qcom/audio/crow-audio-idp.dtsi Normal file
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@@ -0,0 +1,14 @@
#include "crow-audio-overlay.dtsi"
&fm_i2s0_gpios {
status = "ok";
};
&kalama_snd {
qcom,model = "crow-idp-wsa883x-snd-card";
qcom,sku-model = "crow-idp-wsa883x-sku1-snd-card";
nvmem-cells = <&adsp_variant>;
nvmem-cell-names = "adsp_variant";
fsa4480-i2c-handle = <&fsa4480>;
qcom,pri-mi2s-gpios = <&fm_i2s0_gpios>;
};

749
qcom/audio/crow-audio-overlay.dtsi Normal file
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@@ -0,0 +1,749 @@
#include <bindings/qcom,audio-ext-clk.h>
#include <bindings/qcom,lpass-cdc-clk-rsc.h>
#include <bindings/audio-codec-port-types.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "crow-lpi.dtsi"
&lpass_cdc {
qcom,num-macros = <4>;
qcom,lpass-cdc-version = <6>;
#address-cells = <1>;
#size-cells = <1>;
lpass-cdc-clk-rsc-mngr {
compatible = "qcom,lpass-cdc-clk-rsc-mngr";
qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
qcom,rx_mclk_mode_muxsel = <0x033A40D8>;
qcom,wsa_mclk_mode_muxsel = <0x033A20E0>;
qcom,va_mclk_mode_muxsel = <0x03420000>;
clock-names = "tx_core_clk", "rx_core_clk", "wsa_core_clk",
"wsa2_core_clk", "rx_tx_core_clk",
"wsa_tx_core_clk", "wsa2_tx_core_clk", "va_core_clk";
clocks = <&clock_audio_tx_1 0>, <&clock_audio_rx_1 0>,
<&clock_audio_wsa_1 0>,
<&clock_audio_wsa_2 0>, <&clock_audio_rx_tx 0>,
<&clock_audio_wsa_tx 0>, <&clock_audio_wsa2_tx 0>,
<&clock_audio_va_1 0>;
};
va_macro: va-macro@33F0000 {
compatible = "qcom,lpass-cdc-va-macro";
reg = <0x33F0000 0x0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
qcom,va-dmic-sample-rate = <600000>;
qcom,va-clk-mux-select = <1>;
qcom,va-island-mode-muxsel = <0x03420000>;
qcom,default-clk-id = <TX_CORE_CLK>;
qcom,use-clk-id = <VA_CORE_CLK>;
qcom,is-used-swr-gpio = <1>;
qcom,va-swr-gpios = <&va_swr_gpios>;
swr2: va_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <3>;
qcom,mipi-sdw-block-packing-mode = <1>;
swrm-io-base = <0x33b0000 0x0>;
interrupts =
<GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq", "swr_wake_irq";
qcom,swr-wakeup-required = <1>;
qcom,swr-num-ports = <3>;
qcom,swr-port-mapping = <1 SWRM_TX1_CH1 0x1>,
<1 SWRM_TX1_CH2 0x2>,
<1 SWRM_TX1_CH3 0x4>, <1 SWRM_TX1_CH4 0x8>,
<2 SWRM_TX2_CH1 0x1>, <2 SWRM_TX2_CH2 0x2>,
<2 SWRM_TX2_CH3 0x4>, <2 SWRM_TX2_CH4 0x8>,
<3 SWRM_TX3_CH1 0x1>, <3 SWRM_TX3_CH2 0x2>,
<3 SWRM_TX3_CH3 0x4>, <3 SWRM_TX3_CH4 0x8>;
qcom,swr-num-dev = <5>;
qcom,swr-clock-stop-mode0 = <1>;
qcom,swr-mstr-irq-wakeup-capable = <1>;
qcom,is-always-on = <1>;
wcd937x_tx_slave: wcd937x-tx-slave {
compatible = "qcom,wcd937x-slave";
reg = <0x0A 0x01170223>;
};
wcd939x_tx_slave: wcd939x-tx-slave {
status = "disabled";
compatible = "qcom,wcd939x-slave";
reg = <0x0E 0x01170223>;
};
swr_dmic_04: dmic_swr@58350223 {
compatible = "qcom,swr-dmic";
reg = <0x08 0x58350223>;
sound-name-prefix = "SWR_MIC3";
qcom,codec-name = "swr-dmic.04";
qcom,swr-dmic-supply = <3>;
qcom,wcd-handle = <&wcd937x_codec>;
status = "disabled";
};
swr_dmic_03: dmic_swr@58350222 {
compatible = "qcom,swr-dmic";
reg = <0x08 0x58350222>;
sound-name-prefix = "SWR_MIC2";
qcom,codec-name = "swr-dmic.03";
qcom,swr-dmic-supply = <1>;
qcom,wcd-handle = <&wcd937x_codec>;
status = "disabled";
};
swr_dmic_02: dmic_swr@58350221 {
compatible = "qcom,swr-dmic";
reg = <0x08 0x58350221>;
sound-name-prefix = "SWR_MIC1";
qcom,codec-name = "swr-dmic.02";
qcom,swr-dmic-supply = <1>;
qcom,wcd-handle = <&wcd937x_codec>;
status = "disabled";
};
swr_dmic_01: dmic_swr@58350220 {
compatible = "qcom,swr-dmic";
reg = <0x08 0x58350220>;
sound-name-prefix = "SWR_MIC0";
qcom,codec-name = "swr-dmic.01";
qcom,swr-dmic-supply = <3>;
qcom,wcd-handle = <&wcd937x_codec>;
status = "disabled";
};
};
};
tx_macro: tx-macro@3220000 {
compatible = "qcom,lpass-cdc-tx-macro";
reg = <0x3220000 0x0>;
qcom,default-clk-id = <TX_CORE_CLK>;
qcom,tx-dmic-sample-rate = <2400000>;
qcom,is-used-swr-gpio = <0>;
};
rx_macro: rx-macro@3200000 {
compatible = "qcom,lpass-cdc-rx-macro";
reg = <0x3200000 0x0>;
qcom,rx-swr-gpios = <&rx_swr_gpios>;
qcom,rx_mclk_mode_muxsel = <0x033A40D8>;
qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
qcom,default-clk-id = <RX_TX_CORE_CLK>;
clock-names = "rx_mclk2_2x_clk";
clocks = <&clock_audio_rx_mclk2_2x_clk 0>;
swr1: rx_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <2>;
qcom,mipi-sdw-block-packing-mode = <1>;
swrm-io-base = <0x3210000 0x0>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq";
qcom,swr-num-ports = <6>;
qcom,swr-port-mapping = <1 HPH_L 0x1>,
<1 HPH_R 0x2>, <2 CLSH 0x1>,
<3 COMP_L 0x1>, <3 COMP_R 0x2>,
<4 LO 0x1>, <5 DSD_L 0x1>,
<5 DSD_R 0x2>, <6 PCM_OUT1 0x01>;
qcom,swr-num-dev = <2>;
qcom,swr-clock-stop-mode0 = <1>;
swr_haptics: swr_haptics@f0170220 {
compatible = "qcom,pm8550b-swr-haptics";
reg = <0x02 0xf0170220>;
qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>;
status = "disabled";
};
wcd937x_rx_slave: wcd937x-rx-slave {
compatible = "qcom,wcd937x-slave";
reg = <0x0A 0x01170224>;
};
wcd939x_rx_slave: wcd939x-rx-slave {
status = "disabled";
compatible = "qcom,wcd939x-slave";
reg = <0x0E 0x01170224>;
};
};
};
wsa_macro: wsa-macro@3240000 {
compatible = "qcom,lpass-cdc-wsa-macro";
reg = <0x3240000 0x0>;
qcom,wsa-swr-gpios = <&wsa_swr_gpios>;
qcom,wsa-bat-cfgs= <1>, <1>;
qcom,wsa-rloads= <2>, <2>;
qcom,wsa-system-gains= <0 9>, <0 9>;
qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
qcom,default-clk-id = <WSA_TX_CORE_CLK>;
qcom,thermal-max-state = <11>;
qcom,noise-gate-mode = <2>;
#cooling-cells = <2>;
swr0: wsa_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <1>;
qcom,mipi-sdw-block-packing-mode = <0>;
swrm-io-base = <0x3250000 0x0>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq";
qcom,swr-num-ports = <8>;
qcom,swr-clock-stop-mode0 = <1>;
qcom,swr-port-mapping = <1 SPKR_L 0x1>,
<2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>,
<4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>,
<6 SPKR_R_BOOST 0x3>, <7 SPKR_L_VI 0x3>,
<8 SPKR_R_VI 0x3>;
qcom,swr-num-dev = <2>;
qcom,dynamic-port-map-supported = <0>;
wsa884x_0220: wsa884x@02170220 {
status = "disabled";
compatible = "qcom,wsa884x";
reg = <0x4 0x2170220>;
qcom,spkr-sd-n-node = <&wsa_spkr_en00>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
qcom,wsa-macro-handle = <&wsa_macro>;
qcom,swr-wsa-port-params =
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>;
cdc-vdd-1p8-supply = <&L7B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <20000>;
qcom,cdc-vdd-1p8-lpm-supported = <1>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "SpkrLeft";
};
wsa884x_0221: wsa884x@02170221 {
status = "disabled";
compatible = "qcom,wsa884x";
reg = <0x4 0x2170221>;
qcom,spkr-sd-n-node = <&wsa_spkr_en01>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
qcom,wsa-macro-handle = <&wsa_macro>;
qcom,swr-wsa-port-params =
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>;
cdc-vdd-1p8-supply = <&L7B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <20000>;
qcom,cdc-vdd-1p8-lpm-supported = <1>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "SpkrRight";
};
wsa883x_0221: wsa883x@02170221 {
compatible = "qcom,wsa883x";
reg = <0x2 0x2170221>;
qcom,spkr-sd-n-node = <&wsa_spkr_en00>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
cdc-vdd-1p8-supply = <&L7B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <20000>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "SpkrLeft";
};
wsa883x_0222: wsa883x@02170222 {
compatible = "qcom,wsa883x";
reg = <0x2 0x2170222>;
qcom,spkr-sd-n-node = <&wsa_spkr_en01>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
cdc-vdd-1p8-supply = <&L7B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <20000>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "SpkrRight";
};
};
};
wsa2_macro: wsa2-macro@31B0000 {
compatible = "qcom,lpass-cdc-wsa2-macro";
reg = <0x031B0000 0x0>;
qcom,wsa2-swr-gpios = <&wsa2_swr_gpios>;
qcom,wsa-bat-cfgs= <1>, <1>;
qcom,wsa-rloads= <2>, <2>;
qcom,wsa-system-gains= <0 9>, <0 9>;
qcom,wsa2-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
qcom,default-clk-id = <WSA2_TX_CORE_CLK>;
qcom,thermal-max-state = <11>;
qcom,noise-gate-mode = <2>;
#cooling-cells = <2>;
status = "disabled";
swr3: wsa2_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <4>;
qcom,mipi-sdw-block-packing-mode = <0>;
swrm-io-base = <0x31F0000 0x0>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq";
qcom,swr-num-ports = <13>;
qcom,swr-clock-stop-mode0 = <1>;
qcom,swr-port-mapping = <1 SPKR_L 0x1>,
<2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>,
<4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>,
<6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>,
<8 SPKR_HAPT 0x3>, <9 OCPM 0x3>,
<10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>,
<12 SPKR_IPCM 0x3>, <13 CPS 0x3>;
qcom,swr-num-dev = <2>;
qcom,dynamic-port-map-supported = <0>;
wsa884x_2_0220: wsa884x@02170220 {
compatible = "qcom,wsa884x_2";
reg = <0x4 0x2170220>;
qcom,spkr-sd-n-node = <&wsa_spkr_en00>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
qcom,wsa-macro-handle = <&wsa2_macro>;
qcom,swr-wsa-port-params =
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>;
cdc-vdd-1p8-supply = <&L7B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <30000>;
qcom,cdc-vdd-1p8-lpm-supported = <1>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "Spkr2Left";
};
wsa884x_2_0221: wsa884x@02170221 {
compatible = "qcom,wsa884x_2";
reg = <0x4 0x2170221>;
qcom,spkr-sd-n-node = <&wsa_spkr_en01>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
qcom,wsa-macro-handle = <&wsa2_macro>;
qcom,swr-wsa-port-params =
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>;
cdc-vdd-1p8-supply = <&L7B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <30000>;
qcom,cdc-vdd-1p8-lpm-supported = <1>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "Spkr2Right";
};
};
};
wcd937x_codec: wcd937x-codec {
compatible = "qcom,wcd937x-codec";
qcom,split-codec = <1>;
qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
<4 DSD_R 0x2 0 DSD_R>;
qcom,tx_swr_ch_map = <0 ADC1 0x1 4800000 SWRM_TX1_CH1>,
<1 ADC2 0x1 4800000 SWRM_TX2_CH1>,
<1 ADC3 0x2 4800000 SWRM_TX2_CH2>,
<2 DMIC0 0x1 0 SWRM_TX1_CH4>,
<2 DMIC1 0x2 0 SWRM_TX2_CH1>,
<2 MBHC 0x4 4800000 SWRM_TX2_CH2>,
<3 DMIC2 0x1 0 SWRM_TX2_CH3>,
<3 DMIC3 0x2 0 SWRM_TX2_CH4>,
<3 DMIC4 0x4 0 SWRM_TX3_CH1>,
<3 DMIC5 0x8 0 SWRM_TX3_CH2>;
qcom,swr-tx-port-params =
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>;
qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
qcom,rx-slave = <&wcd937x_rx_slave>;
qcom,tx-slave = <&wcd937x_tx_slave>;
cdc-vdd-rxtx-supply = <&L7B>;
qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
qcom,cdc-vdd-rxtx-current = <13890>;
cdc-vddpx-supply = <&L7B>;
qcom,cdc-vddpx-voltage = <1800000 1800000>;
qcom,cdc-vddpx-current = <13890>;
cdc-vdd-buck-supply = <&L7B>;
qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
qcom,cdc-vdd-buck-current = <361110>;
cdc-vdd-mic-bias-supply = <&BOB>;
qcom,cdc-vdd-mic-bias-voltage = <3328000 3328000>;
qcom,cdc-vdd-mic-bias-current = <6760>;
qcom,cdc-micbias1-mv = <1800>;
qcom,cdc-micbias2-mv = <1800>;
qcom,cdc-micbias3-mv = <1800>;
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
"cdc-vddpx";
qcom,cdc-on-demand-supplies = "cdc-vdd-buck";
};
wcd939x_codec: wcd939x-codec {
status = "disabled";
compatible = "qcom,wcd939x-codec";
qcom,split-codec = <1>;
qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
<4 DSD_R 0x2 0 DSD_R>;
qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>,
<0 ADC2 0x2 0 SWRM_TX1_CH2>,
<1 ADC3 0x1 0 SWRM_TX1_CH3>,
<1 ADC4 0x2 0 SWRM_TX1_CH4>,
<2 DMIC0 0x1 0 SWRM_TX2_CH1>,
<2 DMIC1 0x2 0 SWRM_TX2_CH2>,
<2 MBHC 0x4 0 SWRM_TX2_CH3>,
<2 DMIC2 0x4 0 SWRM_TX2_CH3>,
<2 DMIC3 0x8 0 SWRM_TX2_CH4>,
<3 DMIC4 0x1 0 SWRM_TX3_CH1>,
<3 DMIC5 0x2 0 SWRM_TX3_CH2>,
<3 DMIC6 0x4 0 SWRM_TX3_CH3>,
<3 DMIC7 0x8 0 SWRM_TX3_CH4>;
qcom,swr-tx-port-params =
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL0 LANE2>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>;
qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
qcom,rx-slave = <&wcd939x_rx_slave>;
qcom,tx-slave = <&wcd939x_tx_slave>;
cdc-vdd-rx-supply = <&L7B>;
qcom,cdc-vdd-rx-voltage = <1800000 1800000>;
qcom,cdc-vdd-rx-current = <45000>;
qcom,cdc-vdd-rx-lpm-supported = <1>;
cdc-vdd-tx-supply = <&L7B>;
qcom,cdc-vdd-tx-voltage = <1800000 1800000>;
qcom,cdc-vdd-tx-current = <45000>;
qcom,cdc-vdd-tx-lpm-supported = <1>;
cdc-vdd-buck-supply = <&L7B>;
qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
qcom,cdc-vdd-buck-current = <650000>;
qcom,cdc-vdd-buck-lpm-supported = <1>;
cdc-vdd-mic-bias-supply = <&BOB>;
qcom,cdc-vdd-mic-bias-voltage = <3328000 3328000>;
qcom,cdc-vdd-mic-bias-current = <30000>;
cdc-vdd-px-supply = <&L7B>;
qcom,cdc-vdd-px-voltage = <1800000 1800000>;
qcom,cdc-vdd-px-current = <15000>;
qcom,cdc-vdd-px-lpm-supported = <1>;
qcom,cdc-micbias1-mv = <1800>;
qcom,cdc-micbias2-mv = <1800>;
qcom,cdc-micbias3-mv = <1800>;
qcom,cdc-micbias4-mv = <1800>;
qcom,cdc-static-supplies = "cdc-vdd-rx",
"cdc-vdd-tx",
"cdc-vdd-mic-bias",
"cdc-vdd-px";
qcom,cdc-on-demand-supplies = "cdc-vdd-buck";
};
};
&spf_core_platform {
kalama_snd: sound {
qcom,model = "crow-idp-wsa883x-snd-card";
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>;
qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <0>, <0>;
qcom,wcn-bt = <1>;
qcom,ext-disp-audio-rx = <1>;
qcom,tdm-max-slots = <8>;
qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>;
qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>;
qcom,audio-routing =
"AMIC1", "Analog Mic1",
"AMIC1", "MIC BIAS1",
"AMIC2", "Analog Mic2",
"AMIC2", "MIC BIAS2",
"AMIC3", "Analog Mic3",
"AMIC3", "MIC BIAS3",
"AMIC4", "Analog Mic4",
"AMIC4", "MIC BIAS3",
"TX DMIC0", "Digital Mic0",
"TX DMIC0", "MIC BIAS3",
"TX DMIC1", "Digital Mic1",
"TX DMIC1", "MIC BIAS3",
"TX DMIC2", "Digital Mic2",
"TX DMIC2", "MIC BIAS1",
"TX DMIC3", "Digital Mic3",
"TX DMIC3", "MIC BIAS1",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT",
"WSA SRC0_INP", "SRC0",
"WSA_TX DEC0_INP", "TX DEC0 MUX",
"WSA_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK",
"VA DMIC0", "Digital Mic0",
"VA DMIC1", "Digital Mic1",
"VA DMIC2", "Digital Mic2",
"VA DMIC3", "Digital Mic3",
"VA DMIC0", "VA MIC BIAS3",
"VA DMIC1", "VA MIC BIAS3",
"VA DMIC2", "VA MIC BIAS1",
"VA DMIC3", "VA MIC BIAS1";
qcom,msm-mbhc-usbc-audio-supported = <0>;
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>;
qcom,cdc-dmic45-gpios = <&cdc_dmic45_gpios>;
asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd937x_codec>, <&wsa883x_0221>,
<&wsa883x_0222>;
asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
"wcd937x_codec", "wsa-codec1",
"wsa-codec2";
qcom,wsa-max-devs = <2>;
qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>,
<&lpass_cdc>;
qcom,upd_backends_used = "wcd";
qcom,upd_lpass_reg_addr = <0x00000418 0x33B0300>;
qcom,upd_ear_pa_reg_addr = <0x300A>;
};
fm_i2s0_gpios: fm_i2s0_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active
&i2s0_sd0_active>;
pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep
&i2s0_sd0_sleep>;
#gpio-cells = <0>;
};
wsa_swr_gpios: wsa_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>;
pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
wsa2_swr_gpios: wsa2_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wsa2_swr_clk_active &wsa2_swr_data_active>;
pinctrl-1 = <&wsa2_swr_clk_sleep &wsa2_swr_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
rx_swr_gpios: rx_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active
&rx_swr_data1_active>;
pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep
&rx_swr_data1_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
va_swr_gpios: tx_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active
&tx_swr_data1_active &tx_swr_data2_active>;
pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep
&tx_swr_data1_sleep &tx_swr_data2_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
cdc_dmic01_gpios: cdc_dmic01_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
cdc_dmic23_gpios: cdc_dmic23_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>;
pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
cdc_dmic45_gpios: cdc_dmic45_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic45_clk_active &cdc_dmic45_data_active>;
pinctrl-1 = <&cdc_dmic45_clk_sleep &cdc_dmic45_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
cdc_dmic67_gpios: cdc_dmic67_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic67_clk_active &cdc_dmic67_data_active>;
pinctrl-1 = <&cdc_dmic67_clk_sleep &cdc_dmic67_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
};
&soc {
wsa_spkr_en00: wsa_spkr_en1_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&spkr_00_sd_n_active>;
pinctrl-1 = <&spkr_00_sd_n_sleep>;
qcom,lpi-gpios;
};
wsa_spkr_en01: wsa_spkr_en2_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&spkr_01_sd_n_active>;
pinctrl-1 = <&spkr_01_sd_n_sleep>;
qcom,lpi-gpios;
};
wcd_rst_gpio: msm_cdc_pinctrl@32 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wcd_reset_active>;
pinctrl-1 = <&wcd_reset_sleep>;
};
clock_audio_va_1: va_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x307>;
#clock-cells = <1>;
};
clock_audio_wsa_1: wsa_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_2>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x309>;
#clock-cells = <1>;
};
clock_audio_wsa_2: wsa2_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_9>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x310>;
#clock-cells = <1>;
};
clock_audio_rx_1: rx_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
qcom,codec-lpass-ext-clk-freq = <22579200>;
qcom,codec-lpass-clk-id = <0x30E>;
#clock-cells = <1>;
};
clock_audio_rx_tx: rx_core_tx_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_10>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x312>;
#clock-cells = <1>;
};
clock_audio_tx_1: tx_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x30C>;
#clock-cells = <1>;
};
clock_audio_wsa_tx: wsa_core_tx_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_11>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x314>;
#clock-cells = <1>;
};
clock_audio_wsa2_tx: wsa2_core_tx_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_12>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x316>;
#clock-cells = <1>;
};
clock_audio_rx_mclk2_2x_clk: rx_mclk2_2x_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_13>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x318>;
#clock-cells = <1>;
};
};
&adsp_loader {
nvmem-cells = <&adsp_variant>;
nvmem-cell-names = "adsp_variant";
adsp-fw-names = "adsp2.mdt";
adsp-fw-bit-values = <0x7>;
};

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/dts-v1/;
/plugin/;
#include "crow-audio-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Crow QRD";
compatible = "qcom,crow-qrd", "qcom,crow", "qcom,qrd";
qcom,msm-id = <608 0x10000>;
qcom,board-id = <11 0>;
};

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#include "crow-audio-overlay.dtsi"
&tx_swr_clk_active {
config {
drive-strength = <2>;
};
};
&tx_swr_data0_active {
config {
drive-strength = <2>;
};
};
&tx_swr_data1_active {
config {
drive-strength = <2>;
};
};
&tx_swr_data2_active {
config {
drive-strength = <2>;
};
};
&kalama_snd {
qcom,model = "crow-qrd-wsa883x-snd-card";
qcom,sku-model = "crow-qrd-wsa883x-sku1-snd-card";
nvmem-cells = <&adsp_variant>;
nvmem-cell-names = "adsp_variant";
qcom,audio-routing =
"AMIC1", "Analog Mic1",
"AMIC1", "MIC BIAS1",
"AMIC2", "Analog Mic2",
"AMIC2", "MIC BIAS2",
"AMIC3", "Analog Mic3",
"AMIC3", "MIC BIAS3",
"AMIC4", "Analog Mic4",
"AMIC4", "MIC BIAS1",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT",
"WSA SRC0_INP", "SRC0",
"WSA_TX DEC0_INP", "TX DEC0 MUX",
"WSA_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK";
asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd937x_codec>, <&wsa883x_0221>, <&wsa883x_0222>;
asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
"wcd937x_codec", "wsa-codec1", "wsa-codec2";
qcom,msm-mbhc-usbc-audio-supported = <1>;
qcom,msm-mbhc-hphl-swh = <0>;
qcom,msm-mbhc-gnd-swh = <0>;
qcom,wsa-max-devs = <2>;
fsa4480-i2c-handle = <&fsa4480>;
};

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/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,gcc-crow.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interconnect/qcom,crow.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
#include "crow-audio.dtsi"
/ {
model = "Qualcomm Technologies, Inc. crow";
compatible = "qcom,crow", "qcom,crowp";
qcom,msm-id = <608 0x10000>;
qcom,board-id = <0 0>;
};

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#include <bindings/qcom,audio-ext-clk.h>
#include <bindings/qcom,gpr.h>
#include "msm-audio-lpass.dtsi"
&soc {
spf_core_platform: spf_core_platform {
compatible = "qcom,spf-core-platform";
};
lpass_core_hw_vote: vote_lpass_core_hw {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_CORE_HW_VOTE>;
#clock-cells = <1>;
};
lpass_audio_hw_vote: vote_lpass_audio_hw {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>;
#clock-cells = <1>;
};
};
&glink_edge {
audio_gpr: qcom,gpr {
compatible = "qcom,gpr";
qcom,glink-channels = "adsp_apps";
qcom,intents = <0x200 20>;
reg = <GPR_DOMAIN_ADSP>;
spf_core {
compatible = "qcom,spf_core";
reg = <GPR_SVC_ADSP_CORE>;
};
audio-pkt {
compatible = "qcom,audio-pkt";
qcom,audiopkt-ch-name = "apr_audio_svc";
reg = <GPR_SVC_MAX>;
};
audio_prm: q6prm {
compatible = "qcom,audio_prm";
reg = <GPR_SVC_ASM>;
};
};
};
&spf_core_platform {
msm_audio_ion: qcom,msm-audio-ion {
compatible = "qcom,msm-audio-ion";
qcom,smmu-version = <2>;
qcom,smmu-enabled;
iommus = <&apps_smmu 0x1001 0x0>, <&apps_smmu 0x1061 0x0>;
qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>;
qcom,smmu-sid-mask = /bits/ 64 <0xf>;
dma-coherent;
};
msm_audio_ion_cma: qcom,msm-audio-ion-cma {
compatible = "qcom,msm-audio-ion-cma";
};
lpi_tlmm: lpi_pinctrl@3440000 {
compatible = "qcom,lpi-pinctrl";
reg = <0x3440000 0x0>;
qcom,slew-reg = <0x34da000 0x0>;
qcom,gpios-count = <23>;
gpio-controller;
#gpio-cells = <2>;
qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>,
<0x00002000>, <0x00003000>,
<0x00004000>, <0x00005000>,
<0x00006000>, <0x00007000>,
<0x00008000>, <0x00009000>,
<0x0000A000>, <0x0000B000>,
<0x0000C000>, <0x0000D000>,
<0x0000E000>, <0x0000F000>,
<0x00010000>, <0x00011000>,
<0x00012000>, <0x00013000>,
<0x00014000>, <0x00015000>,
<0x00016000>;
qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>,
<0x00000004>, <0x00000008>,
<0x0000000A>, <0x0000000C>,
<0x00000000>, <0x00000000>,
<0x00000000>, <0x00000000>,
<0x00000010>, <0x00000012>,
<0x00000000>, <0x00000000>,
<0x00000006>, <0x00000014>,
<0x00000016>, <0x00000000>,
<0x00000000>, <0x00000000>,
<0x00000000>, <0x00000000>,
<0x00000000>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
};
lpass_cdc: lpass-cdc {
compatible = "qcom,lpass-cdc";
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
lpass-cdc-clk-rsc-mngr {
compatible = "qcom,lpass-cdc-clk-rsc-mngr";
};
va_macro: va-macro@33F0000 {
swr2: va_swr_master {
};
};
tx_macro: tx-macro@3220000 {
};
rx_macro: rx-macro@3200000 {
swr1: rx_swr_master {
};
};
wsa_macro: wsa-macro@3240000 {
swr0: wsa_swr_master {
};
};
wsa2_macro: wsa2-macro@31B0000 {
swr3: wsa2_swr_master {
};
};
};
kalama_snd: sound {
compatible = "qcom,kalama-asoc-snd";
qcom,mi2s-audio-intf = <1>;
qcom,wcn-bt = <0>;
qcom,ext-disp-audio-rx = <0>;
qcom,afe-rxtx-lb = <0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
};
};
&aliases {
swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@3240000/wsa_swr_master";
swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@3200000/rx_swr_master";
swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@33F0000/va_swr_master";
swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@31B0000/wsa2_swr_master";
};

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#include <bindings/qcom,audio-ext-clk.h>
#include <bindings/qcom,lpass-cdc-clk-rsc.h>
#include <bindings/audio-codec-port-types.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "kalama-lpi.dtsi"
&lpass_cdc {
qcom,num-macros = <3>;
qcom,lpass-cdc-version = <7>;
#address-cells = <1>;
#size-cells = <1>;
lpass-cdc-clk-rsc-mngr {
compatible = "qcom,lpass-cdc-clk-rsc-mngr";
qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>,
<0x3004 0x3 0x1>, <0x3080 0x2 0x2>;
qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>;
qcom,wsa_mclk_mode_muxsel = <0x06BEA100>;
qcom,va_mclk_mode_muxsel = <0x06E28000>;
clock-names = "tx_core_clk", "rx_core_clk", "wsa_core_clk",
"wsa2_core_clk", "rx_tx_core_clk",
"wsa_tx_core_clk", "wsa2_tx_core_clk", "va_core_clk";
clocks = <&clock_audio_tx_1 0>, <&clock_audio_rx_1 0>,
<&clock_audio_wsa_1 0>,
<&clock_audio_wsa_2 0>, <&clock_audio_rx_tx 0>,
<&clock_audio_wsa_tx 0>, <&clock_audio_wsa2_tx 0>,
<&clock_audio_va_1 0>;
};
va_macro: va-macro@6D44000 {
compatible = "qcom,lpass-cdc-va-macro";
reg = <0x6D44000 0x0>;
clock-names = "lpass_audio_hw_vote";
clocks = <&lpass_audio_hw_vote 0>;
qcom,va-dmic-sample-rate = <600000>;
qcom,va-clk-mux-select = <1>;
qcom,va-island-mode-muxsel = <0x06E28000>;
qcom,default-clk-id = <TX_CORE_CLK>;
qcom,use-clk-id = <VA_CORE_CLK>;
qcom,is-used-swr-gpio = <1>;
qcom,va-swr-gpios = <&va_swr_gpios>;
swr2: va_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <3>;
qcom,mipi-sdw-block-packing-mode = <1>;
swrm-io-base = <0x6d30000 0x0>;
interrupts =
<GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq", "swr_wake_irq";
qcom,swr-wakeup-required = <1>;
qcom,swr-num-ports = <5>;
qcom,swr-port-mapping = <1 SWRM_TX_PCM_OUT 0x3>,
<2 SWRM_TX1_CH1 0x1>, <2 SWRM_TX1_CH2 0x2>,
<2 SWRM_TX1_CH3 0x4>, <2 SWRM_TX1_CH4 0x8>,
<3 SWRM_TX2_CH1 0x1>, <3 SWRM_TX2_CH2 0x2>,
<3 SWRM_TX2_CH3 0x4>, <3 SWRM_TX2_CH4 0x8>,
<4 SWRM_TX3_CH1 0x1>, <4 SWRM_TX3_CH2 0x2>,
<4 SWRM_TX3_CH3 0x4>, <4 SWRM_TX3_CH4 0x8>,
<5 SWRM_TX_PCM_IN 0x3>;
qcom,swr-num-dev = <5>;
qcom,swr-clock-stop-mode0 = <1>;
qcom,swr-mstr-irq-wakeup-capable = <1>;
qcom,is-always-on = <1>;
wcd938x_tx_slave: wcd938x-tx-slave {
compatible = "qcom,wcd938x-slave";
reg = <0x0D 0x01170223>;
};
swr_dmic_04: dmic_swr@58350223 {
compatible = "qcom,swr-dmic";
reg = <0x08 0x58350223>;
sound-name-prefix = "SWR_MIC3";
qcom,codec-name = "swr-dmic.04";
qcom,swr-dmic-supply = <3>;
qcom,wcd-handle = <&wcd938x_codec>;
status = "disabled";
};
swr_dmic_03: dmic_swr@58350222 {
compatible = "qcom,swr-dmic";
reg = <0x08 0x58350222>;
sound-name-prefix = "SWR_MIC2";
qcom,codec-name = "swr-dmic.03";
qcom,swr-dmic-supply = <1>;
qcom,wcd-handle = <&wcd938x_codec>;
status = "disabled";
};
swr_dmic_02: dmic_swr@58350221 {
compatible = "qcom,swr-dmic";
reg = <0x08 0x58350221>;
sound-name-prefix = "SWR_MIC1";
qcom,codec-name = "swr-dmic.02";
qcom,swr-dmic-supply = <1>;
qcom,wcd-handle = <&wcd938x_codec>;
status = "disabled";
};
swr_dmic_01: dmic_swr@58350220 {
compatible = "qcom,swr-dmic";
reg = <0x08 0x58350220>;
sound-name-prefix = "SWR_MIC0";
qcom,codec-name = "swr-dmic.01";
qcom,swr-dmic-supply = <3>;
qcom,wcd-handle = <&wcd938x_codec>;
status = "disabled";
};
};
};
tx_macro: tx-macro@6AE0000 {
compatible = "qcom,lpass-cdc-tx-macro";
reg = <0x6AE0000 0x0>;
qcom,default-clk-id = <TX_CORE_CLK>;
qcom,tx-dmic-sample-rate = <2400000>;
qcom,is-used-swr-gpio = <0>;
};
rx_macro: rx-macro@6AC0000 {
compatible = "qcom,lpass-cdc-rx-macro";
reg = <0x6AC0000 0x0>;
qcom,rx-swr-gpios = <&rx_swr_gpios>;
qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>;
qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
qcom,default-clk-id = <RX_TX_CORE_CLK>;
clock-names = "rx_mclk2_2x_clk";
clocks = <&clock_audio_rx_mclk2_2x_clk 0>;
swr1: rx_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <2>;
qcom,mipi-sdw-block-packing-mode = <1>;
swrm-io-base = <0x6ad0000 0x0>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq";
qcom,swr-num-ports = <12>;
qcom,swr-port-mapping = <1 HPH_L 0x1>,
<1 HPH_R 0x2>, <2 CLSH 0x3>,
<3 COMP_L 0x1>, <3 COMP_R 0x2>,
<4 LO 0x1>, <5 DSD_L 0x1>,
<5 DSD_R 0x2>, <6 PCM_OUT1 0x01>,
<7 GPPO 0x03>, <8 HAPT 0x03>,
<9 HIFI 0x03>, <10 HPTH 0x03>,
<11 CMPT 0x03>, <12 IPCM 0x03>;
qcom,swr-num-dev = <2>;
qcom,swr-clock-stop-mode0 = <1>;
swr_haptics: swr_haptics@f0170220 {
compatible = "qcom,pm8550b-swr-haptics";
status = "disabled";
reg = <0x02 0xf0170220>;
swr-slave-supply = <&hap_swr_slave_reg>;
qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>;
};
wcd938x_rx_slave: wcd938x-rx-slave {
compatible = "qcom,wcd938x-slave";
reg = <0x0D 0x01170224>;
};
};
};
wsa_macro: wsa-macro@6B00000 {
compatible = "qcom,lpass-cdc-wsa-macro";
status = "disabled";
reg = <0x6B00000 0x0>;
qcom,wsa-swr-gpios = <&wsa_swr_gpios>;
qcom,wsa-bat-cfgs= <1>, <1>;
qcom,wsa-rloads= <2>, <2>;
qcom,wsa-system-gains= <0 9>, <0 9>;
qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
qcom,default-clk-id = <WSA_TX_CORE_CLK>;
qcom,thermal-max-state = <11>;
qcom,noise-gate-mode = <2>;
#cooling-cells = <2>;
swr0: wsa_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <1>;
qcom,mipi-sdw-block-packing-mode = <0>;
swrm-io-base = <0x6b10000 0x0>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq";
qcom,swr-num-ports = <13>;
qcom,swr-clock-stop-mode0 = <1>;
qcom,swr-port-mapping = <1 SPKR_L 0x1>,
<2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>,
<4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>,
<6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>,
<8 SPKR_HAPT 0x3>, <9 OCPM 0x3>,
<10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>,
<12 SPKR_IPCM 0x3>, <13 CPS 0x3>;
qcom,swr-num-dev = <0>;
qcom,dynamic-port-map-supported = <0>;
wsa884x_0220: wsa884x@02170220 {
compatible = "qcom,wsa884x";
reg = <0x4 0x2170220>;
qcom,spkr-sd-n-node = <&wsa_spkr_en02>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
qcom,wsa-macro-handle = <&wsa_macro>;
qcom,swr-wsa-port-params =
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>;
cdc-vdd-1p8-supply = <&L15B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <20000>;
qcom,cdc-vdd-1p8-lpm-supported = <1>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "SpkrLeft";
status = "disabled";
};
wsa884x_0221: wsa884x@02170221 {
compatible = "qcom,wsa884x";
reg = <0x4 0x2170221>;
qcom,spkr-sd-n-node = <&wsa_spkr_en13>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
qcom,wsa-macro-handle = <&wsa_macro>;
qcom,swr-wsa-port-params =
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>;
cdc-vdd-1p8-supply = <&L15B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <20000>;
qcom,cdc-vdd-1p8-lpm-supported = <1>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "SpkrRight";
status = "disabled";
};
};
};
wsa2_macro: wsa2-macro@6AA0000 {
compatible = "qcom,lpass-cdc-wsa2-macro";
reg = <0x6AA0000 0x0>;
qcom,wsa2-swr-gpios = <&wsa2_swr_gpios>;
qcom,wsa-bat-cfgs= <1>, <1>;
qcom,wsa-rloads= <2>, <2>;
qcom,wsa-system-gains= <0 9>, <0 9>;
qcom,wsa2-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>;
qcom,default-clk-id = <WSA2_TX_CORE_CLK>;
qcom,thermal-max-state = <11>;
qcom,noise-gate-mode = <2>;
#cooling-cells = <2>;
status = "disabled";
swr3: wsa2_swr_master {
compatible = "qcom,swr-mstr";
#address-cells = <2>;
#size-cells = <0>;
clock-names = "lpass_core_hw_vote",
"lpass_audio_hw_vote";
clocks = <&lpass_core_hw_vote 0>,
<&lpass_audio_hw_vote 0>;
qcom,swr_master_id = <4>;
qcom,mipi-sdw-block-packing-mode = <0>;
swrm-io-base = <0x6ab0000 0x0>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "swr_master_irq";
qcom,swr-num-ports = <13>;
qcom,swr-clock-stop-mode0 = <1>;
qcom,swr-port-mapping = <1 SPKR_L 0x1>,
<2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>,
<4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>,
<6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>,
<8 SPKR_HAPT 0x3>, <9 OCPM 0x3>,
<10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>,
<12 SPKR_IPCM 0x3>, <13 CPS 0x3>;
qcom,swr-num-dev = <0>;
qcom,dynamic-port-map-supported = <0>;
wsa884x_2_0220: wsa884x@02170220 {
compatible = "qcom,wsa884x_2";
reg = <0x4 0x2170220>;
qcom,spkr-sd-n-node = <&wsa_spkr_en02>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
qcom,wsa-macro-handle = <&wsa2_macro>;
qcom,swr-wsa-port-params =
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL3 LANE0>, <OFFSET1_VAL5 LANE0>, <OFFSET1_VAL0 LANE0>, <OFFSET1_VAL6 LANE0>, <OFFSET1_VAL0 LANE0>;
cdc-vdd-1p8-supply = <&L15B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <20000>;
qcom,cdc-vdd-1p8-lpm-supported = <1>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "Spkr2Left";
status = "disabled";
};
wsa884x_2_0221: wsa884x@02170221 {
compatible = "qcom,wsa884x_2";
reg = <0x4 0x2170221>;
qcom,spkr-sd-n-node = <&wsa_spkr_en13>;
qcom,lpass-cdc-handle = <&lpass_cdc>;
qcom,wsa-macro-handle = <&wsa2_macro>;
qcom,swr-wsa-port-params =
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>,
<OFFSET1_VAL2 LANE0>, <OFFSET1_VAL4 LANE0>, <OFFSET1_VAL21 LANE0>, <OFFSET1_VAL9 LANE0>, <OFFSET1_VAL13 LANE0>, <OFFSET1_VAL25 LANE0>;
cdc-vdd-1p8-supply = <&L15B>;
qcom,cdc-vdd-1p8-voltage = <1800000 1800000>;
qcom,cdc-vdd-1p8-current = <20000>;
qcom,cdc-vdd-1p8-lpm-supported = <1>;
qcom,cdc-static-supplies = "cdc-vdd-1p8";
sound-name-prefix = "Spkr2Right";
status = "disabled";
};
};
};
wcd938x_codec: wcd938x-codec {
compatible = "qcom,wcd938x-codec";
qcom,split-codec = <1>;
qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
<4 DSD_R 0x2 0 DSD_R>;
qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>,
<0 ADC2 0x2 0 SWRM_TX1_CH2>,
<1 ADC3 0x1 0 SWRM_TX1_CH3>,
<1 ADC4 0x2 0 SWRM_TX1_CH4>,
<2 DMIC0 0x1 0 SWRM_TX2_CH1>,
<2 DMIC1 0x2 0 SWRM_TX2_CH2>,
<2 MBHC 0x4 0 SWRM_TX2_CH3>,
<2 DMIC2 0x4 0 SWRM_TX2_CH3>,
<2 DMIC3 0x8 0 SWRM_TX2_CH4>,
<3 DMIC4 0x1 0 SWRM_TX3_CH1>,
<3 DMIC5 0x2 0 SWRM_TX3_CH2>,
<3 DMIC6 0x4 0 SWRM_TX3_CH3>,
<3 DMIC7 0x8 0 SWRM_TX3_CH4>;
qcom,swr-tx-port-params =
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL0 LANE2>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>,
<OFFSET1_VAL0 LANE1>, <OFFSET1_VAL2 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL2 LANE0>,
<OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>, <OFFSET1_VAL1 LANE0>;
qcom,wcd-rst-gpio-node = <&wcd938x_rst_gpio>;
qcom,rx-slave = <&wcd938x_rx_slave>;
qcom,tx-slave = <&wcd938x_tx_slave>;
cdc-vdd-rxtx-supply = <&L15B>;
qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
qcom,cdc-vdd-rxtx-current = <30000>;
qcom,cdc-vdd-rxtx-lpm-supported = <1>;
cdc-vddio-supply = <&L15B>;
qcom,cdc-vddio-voltage = <1800000 1800000>;
qcom,cdc-vddio-current = <30000>;
qcom,cdc-vddio-lpm-supported = <1>;
cdc-vdd-buck-supply = <&L15B>;
qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
qcom,cdc-vdd-buck-current = <650000>;
qcom,cdc-vdd-buck-lpm-supported = <1>;
cdc-vdd-mic-bias-supply = <&BOB1>;
qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>;
qcom,cdc-vdd-mic-bias-current = <30000>;
qcom,cdc-micbias1-mv = <1800>;
qcom,cdc-micbias2-mv = <1800>;
qcom,cdc-micbias3-mv = <1800>;
qcom,cdc-micbias4-mv = <1800>;
qcom,cdc-static-supplies = "cdc-vdd-rxtx",
"cdc-vddio",
"cdc-vdd-mic-bias";
qcom,cdc-on-demand-supplies = "cdc-vdd-buck";
};
};
&spf_core_platform {
kalama_snd: sound {
qcom,model = "kalama-mtp-apq-snd-card";
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>;
qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <0>, <0>;
qcom,wcn-bt = <1>;
qcom,ext-disp-audio-rx = <1>;
qcom,tdm-max-slots = <8>;
qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>;
qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>;
qcom,audio-routing =
"AMIC1", "Analog Mic1",
"AMIC1", "MIC BIAS1",
"AMIC2", "Analog Mic2",
"AMIC2", "MIC BIAS2",
"AMIC3", "Analog Mic3",
"AMIC3", "MIC BIAS3",
"AMIC4", "Analog Mic4",
"AMIC4", "MIC BIAS3",
"AMIC5", "Analog Mic5",
"AMIC5", "MIC BIAS4",
"VA AMIC1", "Analog Mic1",
"VA AMIC1", "VA MIC BIAS1",
"VA AMIC2", "Analog Mic2",
"VA AMIC2", "VA MIC BIAS2",
"VA AMIC3", "Analog Mic3",
"VA AMIC3", "VA MIC BIAS3",
"VA AMIC4", "Analog Mic4",
"VA AMIC4", "VA MIC BIAS3",
"VA AMIC5", "Analog Mic5",
"VA AMIC5", "VA MIC BIAS4",
"TX DMIC0", "Digital Mic0",
"TX DMIC0", "MIC BIAS3",
"TX DMIC1", "Digital Mic1",
"TX DMIC1", "MIC BIAS3",
"TX DMIC2", "Digital Mic2",
"TX DMIC2", "MIC BIAS1",
"TX DMIC3", "Digital Mic3",
"TX DMIC3", "MIC BIAS1",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK",
"VA DMIC0", "Digital Mic0",
"VA DMIC1", "Digital Mic1",
"VA DMIC2", "Digital Mic2",
"VA DMIC3", "Digital Mic3",
"VA DMIC0", "VA MIC BIAS3",
"VA DMIC1", "VA MIC BIAS3",
"VA DMIC2", "VA MIC BIAS1",
"VA DMIC3", "VA MIC BIAS1";
qcom,msm-mbhc-usbc-audio-supported = <0>;
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>;
qcom,cdc-dmic45-gpios = <&cdc_dmic45_gpios>;
asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd938x_codec>, <&swr_haptics>,
<&wsa884x_0220>, <&wsa884x_0221>;
asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
"wcd938x_codec", "swr-haptics",
"wsa-codec1", "wsa-codec2";
qcom,wsa-max-devs = <0>;
qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>,
<&lpass_cdc>;
qcom,upd_backends_used = "wcd";
qcom,upd_lpass_reg_addr = <0x00000418 0x33B0300>;
qcom,upd_ear_pa_reg_addr = <0x300A>;
};
msm_pcm_pcie: qcom,msm-pcm-pcie {
compatible = "qcom,msm-pcm-pcie";
};
fm_i2s1_gpios: fm_i2s1_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&i2s1_sck_active &i2s1_ws_active
&i2s1_sd0_active>;
pinctrl-1 = <&i2s1_sck_sleep &i2s1_ws_sleep
&i2s1_sd0_sleep>;
#gpio-cells = <0>;
};
wsa_swr_gpios: wsa_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>;
pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
wsa2_swr_gpios: wsa2_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wsa2_swr_clk_active &wsa2_swr_data_active>;
pinctrl-1 = <&wsa2_swr_clk_sleep &wsa2_swr_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
rx_swr_gpios: rx_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active
&rx_swr_data1_active>;
pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep
&rx_swr_data1_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
va_swr_gpios: tx_swr_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active
&tx_swr_data1_active &tx_swr_data2_active>;
pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep
&tx_swr_data1_sleep &tx_swr_data2_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
cdc_dmic01_gpios: cdc_dmic01_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>;
pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
cdc_dmic23_gpios: cdc_dmic23_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>;
pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
cdc_dmic45_gpios: cdc_dmic45_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic45_clk_active &cdc_dmic45_data_active>;
pinctrl-1 = <&cdc_dmic45_clk_sleep &cdc_dmic45_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
cdc_dmic67_gpios: cdc_dmic67_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic67_clk_active &cdc_dmic67_data_active>;
pinctrl-1 = <&cdc_dmic67_clk_sleep &cdc_dmic67_data_sleep>;
qcom,lpi-gpios;
#gpio-cells = <0>;
};
};
&soc {
wsa_spkr_en02: wsa_spkr_en1_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&spkr_02_sd_n_active>;
pinctrl-1 = <&spkr_02_sd_n_sleep>;
qcom,lpi-gpios;
};
wsa_spkr_en13: wsa_spkr_en2_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&spkr_13_sd_n_active>;
pinctrl-1 = <&spkr_13_sd_n_sleep>;
qcom,lpi-gpios;
};
wcd938x_rst_gpio: msm_cdc_pinctrl@32 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&wcd938x_reset_active>;
pinctrl-1 = <&wcd938x_reset_sleep>;
};
clock_audio_va_1: va_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x307>;
#clock-cells = <1>;
};
clock_audio_wsa_1: wsa_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_2>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x309>;
#clock-cells = <1>;
};
clock_audio_wsa_2: wsa2_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_9>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x310>;
#clock-cells = <1>;
};
clock_audio_rx_1: rx_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
qcom,codec-lpass-ext-clk-freq = <22579200>;
qcom,codec-lpass-clk-id = <0x30E>;
#clock-cells = <1>;
};
clock_audio_rx_tx: rx_core_tx_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_10>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x312>;
#clock-cells = <1>;
};
clock_audio_tx_1: tx_core_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_6>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x30C>;
#clock-cells = <1>;
};
clock_audio_wsa_tx: wsa_core_tx_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_11>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x314>;
#clock-cells = <1>;
};
clock_audio_wsa2_tx: wsa2_core_tx_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_12>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x316>;
#clock-cells = <1>;
};
clock_audio_rx_mclk2_2x_clk: rx_mclk2_2x_clk {
compatible = "qcom,audio-ref-clk";
qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_13>;
qcom,codec-lpass-ext-clk-freq = <19200000>;
qcom,codec-lpass-clk-id = <0x318>;
#clock-cells = <1>;
};
};

5
qcom/audio/kalama-audio-atp.dts
View File

@@ -4,7 +4,8 @@
#include "kalama-audio-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kalama ATP";
compatible = "qcom,kalama-atp", "qcom,kalama", "qcom,atp";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>;
compatible = "qcom,kalama-atp", "qcom,kalama", "qcom,atp", "qcom,kalamap";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>,
<603 0x20000>, <604 0x20000>;
qcom,board-id = <0x10021 0>;
};

10
qcom/audio/kalama-audio-cdp-apq.dts Normal file
View File

@@ -0,0 +1,10 @@
/dts-v1/;
/plugin/;
#include "kalama-audio-cdp-apq.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kalama CDP";
compatible = "qcom,kalama-cdp", "qcom,kalama", "qcom,cdp";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>;
qcom,board-id = <0x03010001 0x3>;
};

110
qcom/audio/kalama-audio-cdp-apq.dtsi Normal file
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@@ -0,0 +1,110 @@
#include "kalama-audio-apq-overlay.dtsi"
&lpass_cdc {
qcom,num-macros = <4>;
};
&wsa2_macro {
status = "disabled";
};
&swr_dmic_01 {
status = "disabled";
};
&swr_dmic_02 {
status = "disabled";
};
&swr_dmic_03 {
status = "disabled";
};
&swr_dmic_04 {
status = "disabled";
};
&fm_i2s1_gpios {
status = "ok";
};
&kalama_snd {
qcom,model = "kalama-cdp-apq-snd-card";
qcom,audio-routing =
"AMIC1", "Analog Mic1",
"AMIC1", "MIC BIAS1",
"AMIC2", "Analog Mic2",
"AMIC2", "MIC BIAS2",
"AMIC3", "Analog Mic3",
"AMIC3", "MIC BIAS3",
"AMIC4", "Analog Mic4",
"AMIC4", "MIC BIAS3",
"AMIC5", "Analog Mic5",
"AMIC5", "MIC BIAS4",
"VA AMIC1", "Analog Mic1",
"VA AMIC1", "VA MIC BIAS1",
"VA AMIC2", "Analog Mic2",
"VA AMIC2", "VA MIC BIAS2",
"VA AMIC3", "Analog Mic3",
"VA AMIC3", "VA MIC BIAS3",
"VA AMIC4", "Analog Mic4",
"VA AMIC4", "VA MIC BIAS3",
"VA AMIC5", "Analog Mic5",
"VA AMIC5", "VA MIC BIAS4",
"TX DMIC0", "Digital Mic0",
"TX DMIC0", "MIC BIAS3",
"TX DMIC1", "Digital Mic1",
"TX DMIC1", "MIC BIAS3",
"TX DMIC2", "Digital Mic2",
"TX DMIC2", "MIC BIAS1",
"TX DMIC3", "Digital Mic3",
"TX DMIC3", "MIC BIAS1",
"TX DMIC4", "Digital Mic4",
"TX DMIC4", "MIC BIAS4",
"TX DMIC5", "Digital Mic5",
"TX DMIC5", "MIC BIAS4",
"TX DMIC6", "Digital Mic6",
"TX DMIC6", "MIC BIAS3",
"TX DMIC7", "Digital Mic7",
"TX DMIC7", "MIC BIAS3",
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT",
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK",
"VA DMIC0", "Digital Mic0",
"VA DMIC1", "Digital Mic1",
"VA DMIC2", "Digital Mic2",
"VA DMIC3", "Digital Mic3",
"VA DMIC4", "Digital Mic4",
"VA DMIC5", "Digital Mic5",
"VA DMIC6", "Digital Mic6",
"VA DMIC7", "Digital Mic7",
"VA DMIC0", "VA MIC BIAS3",
"VA DMIC1", "VA MIC BIAS3",
"VA DMIC2", "VA MIC BIAS1",
"VA DMIC3", "VA MIC BIAS1",
"VA DMIC4", "VA MIC BIAS4",
"VA DMIC5", "VA MIC BIAS4",
"VA DMIC6", "VA MIC BIAS3",
"VA DMIC7", "VA MIC BIAS3";
qcom,cdc-dmic67-gpios = <&cdc_dmic67_gpios>;
asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd938x_codec>, <&swr_haptics>,
<&wsa884x_0220>, <&wsa884x_0221>;
asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
"wcd938x_codec", "swr-haptics",
"wsa-codec1", "wsa-codec2";
qcom,wsa-max-devs = <0>;
qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>;
};

5
qcom/audio/kalama-audio-cdp.dts
View File

@@ -4,7 +4,8 @@
#include "kalama-audio-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kalama CDP";
compatible = "qcom,kalama-cdp", "qcom,kalama", "qcom,cdp";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>;
compatible = "qcom,kalama-cdp", "qcom,kalama", "qcom,cdp", "qcom,kalamap";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>,
<603 0x20000>, <604 0x20000>;
qcom,board-id = <0x10001 0>;
};

7
qcom/audio/kalama-audio-cdp.dtsi
View File

@@ -28,8 +28,14 @@
status = "ok";
};
&swr_haptics {
status = "disabled";
};
&kalama_snd {
qcom,model = "kalama-cdp-snd-card";
swr-haptics-unsupported;
qcom,audio-routing =
"AMIC1", "Analog Mic1",
"AMIC1", "MIC BIAS1",
@@ -70,7 +76,6 @@
"IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT",
"HAP_IN", "PCM_OUT",
"WSA SRC0_INP", "SRC0",
"WSA_TX DEC0_INP", "TX DEC0 MUX",
"WSA_TX DEC1_INP", "TX DEC1 MUX",

2
qcom/audio/kalama-audio-hdk.dts
View File

@@ -5,6 +5,6 @@
/ {
model = "Qualcomm Technologies, Inc. KalamaP HDK";
compatible = "qcom,kalamap-hdk", "qcom,kalamap", "qcom,hdk";
qcom,msm-id = <536 0x10000>, <536 0x20000>;
qcom,msm-id = <536 0x10000>, <536 0x20000>, <603 0x20000>;
qcom,board-id = <0x1001f 0>;
};

10
qcom/audio/kalama-audio-mtp-apq.dts Normal file
View File

@@ -0,0 +1,10 @@
/dts-v1/;
/plugin/;
#include "kalama-audio-mtp-apq.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kalama MTP";
compatible = "qcom,kalama-mtp", "qcom,kalama", "qcom,mtp";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>;
qcom,board-id = <0x02010008 0x2>;
};

9
qcom/audio/kalama-audio-mtp-apq.dtsi Normal file
View File

@@ -0,0 +1,9 @@
#include "kalama-audio-apq-overlay.dtsi"
&fm_i2s1_gpios {
status = "ok";
};
&kalama_snd {
qcom,sec-mi2s-gpios = <&fm_i2s1_gpios>;
};

3
qcom/audio/kalama-audio-mtp.dts
View File

@@ -5,6 +5,7 @@
/ {
model = "Qualcomm Technologies, Inc. Kalama MTP";
compatible = "qcom,kalama-mtp", "qcom,kalama", "qcom,mtp";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>;
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>,
<604 0x20000>;
qcom,board-id = <0x10008 0>;
};

2
qcom/audio/kalama-audio-rcm.dts
View File

@@ -5,6 +5,6 @@
/ {
model = "Qualcomm Technologies, Inc. Kalama RCM";
compatible = "qcom,kalama-rcm", "qcom,kalama", "qcom,rcm";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>;
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>, <603 0x20000>, <604 0x20000>;
qcom,board-id = <0x10015 0>;
};

4
qcom/audio/kalama-audio.dts
View File

@@ -10,7 +10,7 @@
/ {
model = "Qualcomm Technologies, Inc. Kalama";
compatible = "qcom,kalama";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>, <600 0x20000>, <601 0x20000>;
compatible = "qcom,kalama", "qcom,kalamap";
qcom,msm-id = <519 0x10000>, <536 0x10000>, <519 0x20000>, <536 0x20000>, <600 0x20000>, <601 0x20000>, <603 0x20000>, <604 0x20000>;
qcom,board-id = <0 0>;
};