Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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Merge "ARM: dts: msm: Add rpmh bcm register map for shima" into camera-kernel.lnx.4.0

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Camera Software Integration
2020-10-09 14:08:51 -07:00
committed by Gerrit - the friendly Code Review server
parent 0e1a4200b2 b9e729fca7
commit 74908cc52a
2 changed files with 15 additions and 3 deletions
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10
bindings/msm-cam-cpas.txt
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@@ -156,6 +156,16 @@ First Level Node - CAM CPAS device
Definition: Percentage value to be added to camnoc bw while calculating
camnoc axi clock frequency.
- rpmh-bcm-info
Usage: optional
Value type: <u32:idx> <u32:bcm_fe> <u32:bcm_be> <u32:ddr_idx> <u32:mmnoc_idx>
Definition: Rpmh bcm register map
idx: Total number of BCMs
bcm_fe: First BCM FE (front-end) register offset.
bcm_be: First BCM BE (back-end) register offset.
ddr_idx: DDR BCM index
mmnoc_idx: MMNOC BCM index
- qcom,msm-bus,name
- qcom,msm-bus,num-cases
- qcom,msm-bus,num-paths

8
shima-camera.dtsi
View File

@@ -1313,10 +1313,11 @@
label = "cpas";
arch-compat = "cpas_top";
status = "ok";
reg-names = "cam_cpas_top", "cam_camnoc";
reg-names = "cam_cpas_top", "cam_camnoc", "cam_rpmh";
reg = <0xac40000 0x1000>,
<0xac42000 0x8000>;
reg-cam-base = <0x40000 0x42000>;
<0xac42000 0x8000>,
<0xbbf0000 0x1F00>;
reg-cam-base = <0x40000 0x42000 0x0BBF0000>;
cam_hw_fuse = <CAM_CPAS_MF_HDR_ENABLE 0x007801E0 0x400000 CAM_CPAS_FEATURE_TYPE_ENABLE 0xFF>,
<CAM_CPAS_MP_LIMIT_FUSE 0x7801EC 0x18000000 CAM_CPAS_FEATURE_TYPE_VALUE 0xFF>;
interrupt-names = "cpas_camnoc";
@@ -1367,6 +1368,7 @@
interconnect-names = "cam_ahb";
interconnects =<&gem_noc MASTER_APPSS_PROC
&config_noc SLAVE_CAMERA_CFG>;
rpmh-bcm-info = <12 0x4 0x800 0 4>;
cam-ahb-num-cases = <8>;
cam-ahb-bw-KBps =
<0 0>, <0 76800>, <0 76800>, <0 150000>, <0 150000>,