mirror of
https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
synced 2026-02-01 09:49:52 +00:00
ARM: dts: msm: Add r66451 120fps cphy video mode panel on Diwali target
This change adds r66451 120hz cphy video mode panel on ATP and IDP-AMOLED platform of Diwali target. Change-Id: Ib69dae5847b6bc69e5d6c0ba5c84738e5d36ad0c
This commit is contained in:
BIVASH KUMAR SINGH
@@ -40,6 +40,16 @@
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qcom,platform-reset-gpio = <&tlmm 42 0>;
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};
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&dsi_r66451_amoled_120hz_video_cphy {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_extvdd>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 42 0>;
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};
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&dsi_r66451_amoled_120hz_cmd_cphy {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_extvdd>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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@@ -124,6 +134,7 @@
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&dsi_r66451_amoled_60hz_video
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&dsi_r66451_amoled_cmd
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&dsi_r66451_amoled_120hz_cmd_cphy
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&dsi_r66451_amoled_120hz_video_cphy
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&dsi_r66451_amoled_144hz_video_cphy
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&dsi_r66451_amoled_144hz_cmd_cphy
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&dsi_r66451_amoled_video_cphy
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@@ -17,6 +17,7 @@
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#include "dsi-panel-sim-video.dtsi"
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#include "dsi-panel-sim-dualmipi-cmd.dtsi"
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#include "dsi-panel-sim-dualmipi-video.dtsi"
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#include "dsi-r66451-amoled-120hz-video-cphy.dtsi"
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#include "diwali-sde-display-pinctrl.dtsi"
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@@ -269,6 +270,26 @@
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};
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};
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&dsi_r66451_amoled_120hz_video_cphy {
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qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
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qcom,mdss-dsi-panel-status-check-mode = "reg_read";
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qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
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qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
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qcom,mdss-dsi-panel-status-value = <0x1c>;
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qcom,mdss-dsi-panel-status-read-length = <1>;
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qcom,esd-check-enabled;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 14 1b 05
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19 06 02 04 00 00 00];
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qcom,display-topology = <2 2 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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&dsi_r66451_amoled_cmd {
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qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
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128
display/dsi-r66451-amoled-120hz-video-cphy.dtsi
Normal file
128
display/dsi-r66451-amoled-120hz-video-cphy.dtsi
Normal file
@@ -0,0 +1,128 @@
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&mdss_mdp {
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dsi_r66451_amoled_120hz_video_cphy: qcom,mdss_dsi_r66451_fhd_plus_cphy_120hz_vid {
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qcom,mdss-dsi-panel-name =
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"r66451 amoled video mode dsi visionox panel with DSC";
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qcom,mdss-dsi-panel-type = "dsi_video_mode";
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qcom,mdss-dsi-panel-physical-type = "oled";
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qcom,dsi-ctrl-num = <0>;
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qcom,dsi-phy-num = <0>;
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qcom,mdss-dsi-virtual-channel-id = <0>;
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qcom,mdss-dsi-stream = <0>;
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qcom,mdss-dsi-bpp = <24>;
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qcom,mdss-dsi-border-color = <0>;
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qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
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qcom,mdss-dsi-bllp-eof-power-mode;
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qcom,mdss-dsi-bllp-power-mode;
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qcom,mdss-dsi-lane-0-state;
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qcom,mdss-dsi-lane-1-state;
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qcom,mdss-dsi-lane-2-state;
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qcom,mdss-dsi-dma-trigger = "trigger_sw";
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qcom,mdss-dsi-mdp-trigger = "none";
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qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
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qcom,adjust-timer-wakeup-ms = <1>;
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qcom,panel-cphy-mode;
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qcom,mdss-dsi-panel-hdr-enabled;
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qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000
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17000 15500 30000 8000 3000>;
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qcom,mdss-dsi-panel-peak-brightness = <4200000>;
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qcom,mdss-dsi-panel-blackness-level = <3230>;
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qcom,spr-pack-type = "pentile";
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-framerate = <120>;
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qcom,mdss-dsi-panel-width = <1080>;
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qcom,mdss-dsi-panel-height = <2340>;
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qcom,mdss-dsi-h-front-porch = <96>;
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qcom,mdss-dsi-h-back-porch = <40>;
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qcom,mdss-dsi-h-pulse-width = <32>;
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qcom,mdss-dsi-h-sync-skew = <0>;
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qcom,mdss-dsi-v-back-porch = <4>;
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qcom,mdss-dsi-v-front-porch = <25>;
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qcom,mdss-dsi-v-pulse-width = <1>;
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qcom,mdss-dsi-h-left-border = <0>;
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qcom,mdss-dsi-h-right-border = <0>;
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qcom,mdss-dsi-v-top-border = <0>;
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qcom,mdss-dsi-v-bottom-border = <0>;
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qcom,mdss-dsi-on-command = [
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39 01 00 00 00 00 02 b0 00
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39 01 00 00 00 00 02 b3 01
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39 01 00 00 00 00 02 b0 04
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39 01 00 00 00 00 03 e8 00 02
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39 01 00 00 00 00 03 e4 00 08
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39 01 00 00 00 00 03 b4 20 1c
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39 01 00 00 00 00 0d b6 6c 00 06 23 af
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13 1a 05 04 fa 05 20
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39 01 00 00 00 00 02 b0 00
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39 01 00 00 00 00 32 c4 00 00 00 00 00
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00 00 00 10 00 00 02 00 00 00 29 00
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01 00 00 00 00 00 00 00 00 00 00 00
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22 00 00 00 00 11 00 00 0c 00 00 00
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00 30 00 00 00 00 00 00
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39 01 00 00 00 00 86 cf 64 0b 00 22 00
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cd 03 33 04 00 0b 77 01 01 01 02 02
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03 03 04 04 04 04 05 00 00 00 3b 00
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3b 01 64 01 64 01 64 01 64 01 64 01
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64 03 ff 03 ff 03 ff 00 00 00 3b 00
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3b 01 64 01 64 01 64 01 64 01 64 01
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64 03 ff 03 ff 03 ff 01 62 01 62 01
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62 01 62 01 62 01 62 01 62 01 62 01
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62 01 62 01 62 01 62 19 19 19 19 19
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19 19 19 19 19 19 19 00 00 00 43 00
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43 01 98 01 98 06 61 06 61 0f f6 0f
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f6 0f f6 0f f6 0f f6 19
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39 01 00 00 00 00 09 d1 05 00 21 02 24
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19 24 2d
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39 01 00 00 00 00 15 d3 49 00 00 01 1a
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15 00 15 07 0f 77 77 77 37 b2 11 00
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a0 3c 9a
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39 01 00 00 00 00 1a d7 00 b9 34 00 40
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04 00 f0 0f 00 40 00 00 00 00 00 00
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19 34 00 40 04 00 f0 0f
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39 01 00 00 00 00 34 d8 00 00 00 00 00
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00 00 00 00 3a 00 3a 00 3a 00 3a 00
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3a 05 00 00 00 00 00 00 00 00 00 0f
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00 0f 00 00 00 00 00 00 00 00 00 00
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00 00 00 0f 00 2f 00 0f 00 20
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39 01 00 00 00 00 2b df 50 42 58 81 2d
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00 00 00 00 00 00 6b 00 00 00 00 00
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00 00 00 01 0f ff d4 0e 00 00 00 00
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00 00 0f 53 18 00 0f 00 00 00 00 00
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00
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39 01 00 00 00 00 03 eb 8b 8b
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39 01 00 00 00 00 02 f7 01
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39 01 00 00 00 00 02 b0 80
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39 01 00 00 00 00 0a e4 34 b4 00 00 00
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30 04 0c e2
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39 01 00 00 00 00 02 e6 00
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39 01 00 00 00 00 02 b0 04
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39 01 00 00 00 00 03 df 50 40
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39 01 00 00 00 00 06 f3 50 00 00 00 00
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39 01 00 00 00 00 02 f2 11
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39 01 00 00 00 00 06 f3 01 00 00 00 01
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39 01 00 00 00 00 03 f4 00 02
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39 01 00 00 00 00 02 f2 19
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39 01 00 00 00 00 03 df 50 42
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39 01 00 00 00 00 05 2a 00 00 04 37
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39 01 00 00 00 00 05 2b 00 00 09 23
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05 01 00 00 78 00 01 11
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05 01 00 00 00 00 01 29
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];
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qcom,mdss-dsi-off-command = [
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05 01 00 00 14 00 02 28 00
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05 01 00 00 78 00 02 10 00];
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qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
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qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
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qcom,mdss-dsi-h-sync-pulse = <0>;
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qcom,compression-mode = "dsc";
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qcom,mdss-dsc-slice-height = <20>;
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qcom,mdss-dsc-slice-width = <540>;
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qcom,mdss-dsc-slice-per-pkt = <2>;
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qcom,mdss-dsc-bit-per-component = <8>;
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qcom,mdss-dsc-bit-per-pixel = <8>;
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qcom,mdss-dsc-block-prediction-enable;
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};
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};
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};
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};
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