Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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ARM: dts: msm: Update apps and display RSC to support multi DRV for waipio

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Update device nodes to mention DRV and channel configuration for RSCes.

Change-Id: I6c86dcc9cd05dba5afe193bf511b67d3f816b9ad
This commit is contained in:
Maulik Shah
2021-10-22 11:43:13 +05:30
parent c666dc0cc8
commit b8b4578d0f
3 changed files with 44 additions and 34 deletions
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2
qcom/waipio-pm8010-spmi.dtsi
View File

@@ -9,7 +9,7 @@
qcom,pmic-id-size = <10>;
};
&apps_rsc {
&apps_rsc_drv2 {
rpmh-regulator-ldoi2 {
compatible = "qcom,rpmh-vrm-regulator";
qcom,resource-name = "ldoi2";

2
qcom/waipio-regulators.dtsi
View File

@@ -1,6 +1,6 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
&apps_rsc {
&apps_rsc_drv2 {
rpmh-regulator-gfxlvl {
compatible = "qcom,rpmh-arc-regulator";
qcom,resource-name = "gfx.lvl";

74
qcom/waipio.dtsi
View File

@@ -2522,35 +2522,39 @@
compatible = "qcom,rpmh-rsc";
reg = <0x17a00000 0x10000>,
<0x17a10000 0x10000>,
<0x17a20000 0x10000>,
<0x17a30000 0x10000>;
reg-names = "drv-0", "drv-1", "drv-2", "drv-3";
<0x17a20000 0x10000>;
reg-names = "drv-0", "drv-1", "drv-2";
qcom,drv-count = <3>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
/* No interrupt into GIC for DRV3 */
qcom,tcs-offset = <0xd00>;
qcom,drv-id = <2>;
qcom,tcs-config = <ACTIVE_TCS 3>,
<SLEEP_TCS 2>,
<WAKE_TCS 2>,
<CONTROL_TCS 0>, /* PDC wakeup values will be written from TZ */
<FAST_PATH_TCS 1>;
power-domains = <&CLUSTER_PD>;
apps_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
};
apps_rsc_drv2: drv@2 {
qcom,drv-id = <2>;
qcom,tcs-offset = <0xd00>;
channel@0 {
qcom,tcs-config = <ACTIVE_TCS 3>,
<SLEEP_TCS 2>,
<WAKE_TCS 2>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 1>;
};
clock_rpmh: qcom,rpmhclk {
compatible = "qcom,waipio-rpmh-clk";
#clock-cells = <1>;
};
apps_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
};
dcvs_fp: qcom,dcvs-fp {
compatible = "qcom,dcvs-fp";
qcom,ddr-bcm-name = "MC3";
qcom,llcc-bcm-name = "SH5";
clock_rpmh: qcom,rpmhclk {
compatible = "qcom,waipio-rpmh-clk";
#clock-cells = <1>;
};
dcvs_fp: qcom,dcvs-fp {
compatible = "qcom,dcvs-fp";
qcom,ddr-bcm-name = "MC3";
qcom,llcc-bcm-name = "SH5";
};
};
};
@@ -2559,19 +2563,25 @@
compatible = "qcom,rpmh-rsc";
reg = <0xaf20000 0x10000>;
reg-names = "drv-0";
qcom,drv-count = <1>;
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_dispcc DISP_CC_MDSS_RSCC_AHB_CLK>;
qcom,tcs-offset = <0x1c00>;
qcom,drv-id = <0>;
qcom,tcs-config = <ACTIVE_TCS 0>,
<SLEEP_TCS 1>,
<WAKE_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
disp_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
qcom,tcs-wait = <QCOM_ICC_TAG_AMC>;
disp_rsc_drv0: drv@0 {
qcom,drv-id = <0>;
qcom,tcs-offset = <0x1c00>;
channel@0 {
qcom,tcs-config = <ACTIVE_TCS 0>,
<SLEEP_TCS 1>,
<WAKE_TCS 1>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
disp_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
qcom,tcs-wait = <QCOM_ICC_TAG_AMC>;
};
};
};