dt-bindings: clock: Add clock controller bindings for Khaje

Add RPMCC, GCC, DISPCC, GPUCC, DEBUGCC clock controller
binding documentation for Khaje device.

Change-Id: I65860ddc3b5da22013a95c79c62ad322ec3c46db
This commit is contained in:
Chetan C R
2022-03-06 19:45:54 +05:30
committed by Gerrit - the friendly Code Review server
parent cbe4f46700
commit c72e0dd8ea
5 changed files with 7 additions and 1 deletions

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@@ -13,6 +13,7 @@ Required properties :
"qcom,kalama-debugcc"
"qcom,sm8150-debugcc"
"qcom,cinder-debugcc"
"qcom,khaje-debugcc"
- qcom,gcc: phandle to the GCC device node.
- qcom,videocc: phandle to the Video CC device node.

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@@ -14,6 +14,7 @@ Required properties :
"qcom,kalama-dispcc"
"qcom,sm8150-dispcc"
"qcom,sm8150-dispcc-v2"
"qcom,khaje-dispcc"
- reg : shall contain base register location and length.
- #clock-cells : from common clock binding, shall contain 1.

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@@ -35,6 +35,7 @@ Required properties :
"qcom,diwali-gcc"
"qcom,kalama-gcc"
"qcom,cinder-gcc"
"qcom,khaje-gcc"
- reg : shall contain base register location and length
- vdd_cx-supply: The vdd_cx logic rail supply.

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@@ -12,7 +12,8 @@ Required properties :
"qcom,kalama-gpucc"
"qcom,sm8150-gpucc",
"qcom,sa8155-gpucc",
"qcom,scshrike-gpucc".
"qcom,scshrike-gpucc",
"qcom,khaje-gpucc".
- reg: shall contain base register offset and size.
- reg-names: names of registers listed in the same order as in the reg property.

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@@ -25,6 +25,8 @@ Required properties :
"qcom,rpmcc-msm8998", "qcom,rpmcc"
"qcom,rpmcc-qcs404", "qcom,rpmcc"
"qcom,rpmcc-sdm660", "qcom,rpmcc"
"qcom,rpmcc-holi", "qcom,rpmcc"
"qcom,rpmcc-khaje", "qcom,rpmcc"
- #clock-cells : shall contain 1