Merge "ARM: dts: msm: Add LTR threshold support for sdxpinn"

This commit is contained in:
qctecmdr
2022-11-24 13:42:34 -08:00
committed by Gerrit - the friendly Code Review server

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@@ -118,6 +118,8 @@
qcom,tpwr-on-value = <9>;
qcom,eq-fmdc-t-min-phase23 = <1>;
qcom,slv-addr-space-size = <0x4000000>;
qcom,l1-2-th-scale = <2>;
qcom,l1-2-th-value = <150>;
qcom,ep-latency = <10>;
qcom,num-parf-testbus-sel = <0xb9>;
qcom,target-link-speed = <3>;
@@ -426,6 +428,8 @@
qcom,tpwr-on-value = <9>;
qcom,eq-fmdc-t-min-phase23 = <1>;
qcom,slv-addr-space-size = <0x4000000>;
qcom,l1-2-th-scale = <2>;
qcom,l1-2-th-value = <150>;
qcom,ep-latency = <10>;
qcom,num-parf-testbus-sel = <0xb9>;
@@ -682,6 +686,8 @@
qcom,tpwr-on-value = <9>;
qcom,eq-fmdc-t-min-phase23 = <1>;
qcom,slv-addr-space-size = <0x4000000>;
qcom,l1-2-th-scale = <2>;
qcom,l1-2-th-value = <150>;
qcom,ep-latency = <10>;
qcom,num-parf-testbus-sel = <0xb9>;