Merge "ARM: dts: msm: Increase IOVA size for CB"

This commit is contained in:
qctecmdr
2022-11-08 03:00:46 -08:00
committed by Gerrit - the friendly Code Review server

View File

@@ -2727,7 +2727,7 @@
iommus = <&apps_smmu 0x1961 0x0000>,
<&apps_smmu 0x0C01 0x0020>,
<&apps_smmu 0x19C1 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2738,7 +2738,7 @@
iommus = <&apps_smmu 0x1962 0x0000>,
<&apps_smmu 0x0C02 0x0020>,
<&apps_smmu 0x19C2 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2749,7 +2749,7 @@
iommus = <&apps_smmu 0x1963 0x0000>,
<&apps_smmu 0x0C03 0x0020>,
<&apps_smmu 0x19C3 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2760,7 +2760,7 @@
iommus = <&apps_smmu 0x1964 0x0000>,
<&apps_smmu 0x0C04 0x0020>,
<&apps_smmu 0x19C4 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2771,7 +2771,7 @@
iommus = <&apps_smmu 0x1965 0x0000>,
<&apps_smmu 0x0C05 0x0020>,
<&apps_smmu 0x19C5 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2782,7 +2782,7 @@
iommus = <&apps_smmu 0x1966 0x0000>,
<&apps_smmu 0x0C06 0x0020>,
<&apps_smmu 0x19C6 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2793,7 +2793,7 @@
iommus = <&apps_smmu 0x1967 0x0000>,
<&apps_smmu 0x0C07 0x0020>,
<&apps_smmu 0x19C7 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2804,7 +2804,7 @@
iommus = <&apps_smmu 0x1968 0x0000>,
<&apps_smmu 0x0C08 0x0020>,
<&apps_smmu 0x19C8 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2816,7 +2816,7 @@
iommus = <&apps_smmu 0x1969 0x0000>,
<&apps_smmu 0x0C09 0x0020>,
<&apps_smmu 0x19C9 0x0010>;
qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x40000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
dma-coherent;
@@ -2827,7 +2827,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1003 0x0080>,
<&apps_smmu 0x1063 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2837,7 +2837,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1004 0x0080>,
<&apps_smmu 0x1064 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2847,7 +2847,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1005 0x0080>,
<&apps_smmu 0x1065 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
shared-cb = <8>;
dma-coherent;
@@ -2858,7 +2858,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1006 0x0080>,
<&apps_smmu 0x1066 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2868,7 +2868,7 @@
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1007 0x0080>,
<&apps_smmu 0x1067 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2879,7 +2879,7 @@
iommus = <&apps_smmu 0x196C 0x0000>,
<&apps_smmu 0x0C0C 0x0020>,
<&apps_smmu 0x19CC 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2890,7 +2890,7 @@
iommus = <&apps_smmu 0x196D 0x0000>,
<&apps_smmu 0x0C0D 0x0020>,
<&apps_smmu 0x19CD 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2901,7 +2901,7 @@
iommus = <&apps_smmu 0x196E 0x0000>,
<&apps_smmu 0x0C0E 0x0020>,
<&apps_smmu 0x19CE 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
@@ -2912,7 +2912,7 @@
iommus = <&apps_smmu 0x196F 0x0000>,
<&apps_smmu 0x0C0F 0x0020>,
<&apps_smmu 0x19CF 0x0010>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};