Merge "ARM: dts: msm: Incorrect SID used for Cinder QUP"

This commit is contained in:
qctecmdr
2022-05-18 12:30:41 -07:00
committed by Gerrit - the friendly Code Review server

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@@ -39,7 +39,7 @@
<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
qcom,gpii-mask = <0x3e>;
qcom,gpii-mask = <0xf6>;
qcom,ev-factor = <2>;
qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
qcom,gpi-ee-offset = <0x10000>;
@@ -56,7 +56,7 @@
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
iommus = <&apps_smmu 0xa3 0x0>;
iommus = <&apps_smmu 0xe3 0x0>;
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
qcom,iommu-geometry = <0x40000000 0x10000000>;
qcom,iommu-dma = "fastmap";
@@ -398,7 +398,7 @@
#dma-cells = <5>;
reg = <0xa00000 0x60000>;
reg-names = "gpi-top";
iommus = <&apps_smmu 0x436 0x0>;
iommus = <&apps_smmu 0x116 0x0>;
qcom,max-num-gpii = <12>;
interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
@@ -429,7 +429,7 @@
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
iommus = <&apps_smmu 0x423 0x0>;
iommus = <&apps_smmu 0x103 0x0>;
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
qcom,iommu-geometry = <0x40000000 0x10000000>;
qcom,iommu-dma = "fastmap";