Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Add ref_clk to PHY node for Anorak

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This change adds proper ref_clk for PHY to be
operational on Anorak.

Change-Id: I6a7e72027f9ff49ad2e6091a0146d6a16fa8b6f6
This commit is contained in:
Uttkarsh Aggarwal
2022-07-14 18:40:56 +05:30
parent c5089358c1
commit 310c5c6abe
1 changed files with 6 additions and 4 deletions
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10
qcom/anorak-usb.dtsi
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@@ -79,8 +79,9 @@
vdda33-supply = <&L15B>;
qcom,vdd-voltage-level = <0 880000 918750>;
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "ref_clk_src";
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB2_0_CLKREF_EN>;
clock-names = "ref_clk_src", "ref_clk";
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
reset-names = "phy_reset";
@@ -106,10 +107,11 @@
<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK_SRC>,
<&usb3_phy_wrapper_gcc_usb30_pipe_clk>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_0_CLKREF_EN>;
clock-names = "aux_clk", "pipe_clk", "pipe_clk_mux",
"pipe_clk_ext_src", "ref_clk_src",
"com_aux_clk";
"com_aux_clk", "ref_clk";
resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
<&gcc GCC_USB3_PHY_PRIM_BCR>;