Merge "ARM: dts: msm: Add MHI nodes for waipio endpoint"

This commit is contained in:
qctecmdr
2021-10-12 12:34:27 -07:00
committed by Gerrit - the friendly Code Review server
2 changed files with 42 additions and 0 deletions

41
qcom/waipio-mhi.dtsi Normal file
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@@ -0,0 +1,41 @@
&pcie1 {
qcom,no-l1ss-supported;
};
&pcie1_rp {
#address-cells = <5>;
#size-cells = <0>;
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
pci-ids = "17cb:0111";
/* controller specific configuration */
qcom,iommu-group = <&mhi_0_iommu_group>;
/* mhi bus specific settings */
mhi,max-channels = <2>;
mhi,timeout = <2000>;
mhi,name = "sxr";
#address-cells = <1>;
#size-cells = <1>;
interconnects = <&pcie_noc MASTER_PCIE_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_ddr";
qcom,mhi-bus-bw-cfg = <0 0>, /* no vote */
<250000 0>, /* avg bw / AB: 2 GBps, peak bw / IB: no vote */
<500000 0>, /* avg bw / AB: 4 GBps, peak bw / IB: no vote */
<1000000 0>, /* avg bw / AB: 8 GBps, peak bw / IB: no vote */
<2000000 0>; /* avg bw / AB: 16 GBps, peak bw / IB: no vote */
mhi_0_iommu_group: mhi_0_iommu_group {
qcom,iommu-dma-addr-pool = <0x20000000 0x1fffffff>;
qcom,iommu-dma = "atomic";
qcom,iommu-pagetable = "coherent";
};
};
};

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@@ -3651,6 +3651,7 @@
#include "waipio-debug.dtsi"
#include "waipio-eva.dtsi"
#include "waipio-pcie.dtsi"
#include "waipio-mhi.dtsi"
#include "msm-rdbg.dtsi"
#include "waipio-gpu.dtsi"
#include "waipio-thermal.dtsi"