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ARM: dts: msm: Add MHI nodes for waipio endpoint

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Add MHI nodes to enumerate a waipio device as a
PCIe endpoint.

Change-Id: I3fd3de4938aa8c43a5e49b94fba2558226b64152
This commit is contained in:
Sriharsha Allenki
2021-09-22 15:01:49 +05:30
parent d6e31526f6
commit 6bbc68de1f
2 changed files with 42 additions and 0 deletions
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41
qcom/waipio-mhi.dtsi Normal file
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@@ -0,0 +1,41 @@
&pcie1 {
qcom,no-l1ss-supported;
};
&pcie1_rp {
#address-cells = <5>;
#size-cells = <0>;
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
pci-ids = "17cb:0111";
/* controller specific configuration */
qcom,iommu-group = <&mhi_0_iommu_group>;
/* mhi bus specific settings */
mhi,max-channels = <2>;
mhi,timeout = <2000>;
mhi,name = "sxr";
#address-cells = <1>;
#size-cells = <1>;
interconnects = <&pcie_noc MASTER_PCIE_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_ddr";
qcom,mhi-bus-bw-cfg = <0 0>, /* no vote */
<250000 0>, /* avg bw / AB: 2 GBps, peak bw / IB: no vote */
<500000 0>, /* avg bw / AB: 4 GBps, peak bw / IB: no vote */
<1000000 0>, /* avg bw / AB: 8 GBps, peak bw / IB: no vote */
<2000000 0>; /* avg bw / AB: 16 GBps, peak bw / IB: no vote */
mhi_0_iommu_group: mhi_0_iommu_group {
qcom,iommu-dma-addr-pool = <0x20000000 0x1fffffff>;
qcom,iommu-dma = "atomic";
qcom,iommu-pagetable = "coherent";
};
};
};

1
qcom/waipio.dtsi
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@@ -3655,6 +3655,7 @@
#include "waipio-debug.dtsi"
#include "waipio-eva.dtsi"
#include "waipio-pcie.dtsi"
#include "waipio-mhi.dtsi"
#include "msm-rdbg.dtsi"
#include "waipio-gpu.dtsi"
#include "waipio-thermal.dtsi"