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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
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dt-bindings: Merge all IOMMU documentation from msm-4.19 to msm-lahaina
This patch merges all of the IOMMU documentation and bindings from msm-4.19 to msm-lahaina. Change-Id: Ie6d2018efa7f54e71a601c6c6173b9445eaa0708
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@@ -17,6 +17,7 @@ conditions.
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"arm,mmu-401"
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"arm,mmu-500"
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"cavium,smmu-v2"
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"qcom,qsmmu-v500"
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"qcom,smmu-v2"
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depending on the particular implementation and/or the
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@@ -33,6 +34,8 @@ conditions.
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- reg : Base address and size of the SMMU.
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- reg-names : For the "qcom,qsmmu-v500" device "tcu-base" is expected.
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- #global-interrupts : The number of global interrupts exposed by the
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device.
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@@ -97,6 +100,68 @@ conditions.
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- power-domains: Specifiers for power domains required to be powered on for
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the SMMU to operate, as per generic power domain bindings.
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- attach-impl-defs : global registers to program at device attach
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time. This should be a list of 2-tuples of the format:
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<offset reg_value>.
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- qcom,fatal-asf : Enable BUG_ON for address size faults. Some hardware
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requires special fixups to recover from address size
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faults. Rather than applying the fixups just BUG since
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address size faults are due to a fundamental programming
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error from which we don't care about recovering anyways.
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- qcom,skip-init : Disable resetting configuration for all context banks
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during device reset. This is useful for targets where
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some context banks are dedicated to other execution
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environments outside of Linux and those other EEs are
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programming their own stream match tables, SCTLR, etc.
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Without setting this option we will trample on their
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configuration.
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- qcom,use-3-lvl-tables:
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Some hardware configurations may not be optimized for using
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a four level page table configuration. Set to use a three
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level page table instead.
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- qcom,no-asid-retention:
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Some hardware may lose internal state for asid after
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retention. No cache invalidation operations involving asid
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may be used.
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- qcom,actlr:
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An array of <sid mask actlr-setting>.
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Any sid X for which X&~mask==sid will be programmed with the
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given actlr-setting.
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-qcom,disable-atos:
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Some hardware may not have full support for atos debugging
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in tandem with other features like power collapse.
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-qcom,opt-out-tbu-halting:
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Allow certain TBUs to opt-out from being halted for the
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ATOS operation to proceed. Halting certain TBUs would cause
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considerable impact to the system such as deadlocks on demand.
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Such TBUs can be opted out to be halted from software.
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- qcom,deferred-regulator-disable-delay : The time delay for deferred regulator
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disable in ms. In case of unmap call, regulator is
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enabled/disabled. This may introduce additional delay. For
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clients who do not detach, it's not possible to keep regulator
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vote while smmu is attached. Type is <u32>.
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- (%s)-supply : Phandle of the regulator that should be powered on during
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SMMU register access. (%s) is a string from the
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qcom,regulator-names property.
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- qcom,regulator-names :
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List of strings to use with the (%s)-supply property.
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- interconnects:
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Pairs of phandles and interconnect provider specifier to
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denote the edge source and destination ports of the
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interconnect path. For more information, please see
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bindings/interconnect/interconnect.txt
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** Deprecated properties:
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- mmu-masters (deprecated in favour of the generic "iommus" binding) :
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@@ -107,6 +172,68 @@ conditions.
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property, indicating the number of Stream ID
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arguments associated with its phandle.
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** Additional properties for Iommu Clients:
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- qcom,iommu-dma:
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Optional, String.
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Can be one of "bypass", "fastmap", "atomic", "disabled".
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--- "default":
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Standard iommu translation behavior.
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The iommu framework will automatically create a domain for the client.
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iommu and DMA apis may not be called in atomic context.
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--- "bypass":
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DMA APIs will use 1-to-1 translation between dma_addr and phys_addr.
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Allows using iommu and DMA apis in atomic context.
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--- "fastmap":
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DMA APIs will run faster, but use several orders of magnitude more memory.
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Also allows using iommu and DMA apis in atomic context.
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--- "atomic":
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Allows using iommu and DMA apis in atomic context.
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--- "disabled":
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The iommu client is responsible for allocating an iommu domain, as
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well as calling iommu_map to create the desired mappings.
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- qcom,iommu-faults:
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Optional, List of Strings.
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The SCTLR register setting which affect iommu faults handling.
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Any combination of the below strings may be used. Mutliple
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values are accepted.
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--- "default":
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Any faults are treated as fatal errors.
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--- "no-CFRE":
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Iommu faults do not return an abort to the client hardware.
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--- "non-fatal":
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Iommu faults do not trigger a kernel panic.
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--- "stall-disable":
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Iommu faults do not stall the client while the fault
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interrupt is being handled.
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- qcom,iommu-vmid:
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Optional, Int.
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An identifier indicating the security state of the client.
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- qcom,iommu-pagetable:
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Optional, String.
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Enables coherency for the IOMMU device, but not for the Client.
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--- "default":
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Pagetables are not coherent nor cached in the system cache..
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--- "coherent"
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Pagetables are io-coherent.
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--- "LLC"
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Pagetables may be saved in the system cache.
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--- "LLC_NWA"
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Pagetables may be saved in the system cache is used, and
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write-allocate hint is disabled.
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- qcom,iommu-earlymap:
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Optional, Bool.
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Support creating mappings in the page-table before Stage 1 translation is
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enabled.
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- qcom,iommu-dma-addr-pool:
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Optional, tuple of <address size>.
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Defaults to <0, SZ_4G> if not present.
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Indicates the range of addresses that the dma layer will use.
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** Examples:
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/* SMMU with stream matching or stream indexing */
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@@ -180,3 +307,37 @@ conditions.
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<&mmcc SMMU_MDP_AHB_CLK>;
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clock-names = "bus", "iface";
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};
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* Qualcomm Technologies, Inc. MMU-500 TBU Device
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The qcom,qsmmu-v500 device implements a number of register regions containing
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debug functionality. Each register region maps to a separate tbu from the
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arm mmu-500 implementation.
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** TBU required properties:
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- compatible : Should be one of:
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"qcom,qsmmuv500-tbu"
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- reg : Base address and size.
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- reg-names : "base" and "status-reg" are expected
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"base" is the main TBU register region.
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"status-reg" indicates whether hw can process a new request.
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-qcom,stream-id-range:
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Pair of values describing the smallest supported stream-id
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and the size of the entire set.
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Example:
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smmu {
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compatible = "qcom,qsmmu-v500";
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tbu@0x1000 {
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compatible = "qcom,qsmmuv500-tbu";
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regs = <0x1000 0x1000>,
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<0x2000 0x8>;
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reg-names = "base",
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"status-reg";
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qcom,stream-id-range = <0x800 0x400>;
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};
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};
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39
bindings/iommu/iommu-debug-test.yaml
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39
bindings/iommu/iommu-debug-test.yaml
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@@ -0,0 +1,39 @@
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/iommu/iommu-debug-test.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: IOMMU Debugging and Testing Framework binding
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maintainers:
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- Isaac J. Manjarres <isaacm@quicinc.com>
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description: |
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The IOMMU Debugging and Testing Framework is used for collecting information
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that is useful for debugging/instrumenting the IOMMU framework code, as well
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as testing various IOMMU related features.
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properties:
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compatible:
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items:
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- const: iommu-debug-test
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iommus:
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minItems: 1
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items:
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- description: IOMMU specifier with a SID and an SMR mask
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description:
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The SID in the IOMMU specifier is a placeholder so that the SMMU driver
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can recognize the node. Our test uses ATOS, which doesn't use SIDs anyway,
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so using a dummy value is ok.
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required:
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- compatible
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- iommus
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examples:
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- |
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iommu_test_device {
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compatible = "iommu-debug-test";
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iommus = <&cpp_fd_smmu 42>;
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};
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29
bindings/soc/qcom/qcom,secure-buffer.yaml
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29
bindings/soc/qcom/qcom,secure-buffer.yaml
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@@ -0,0 +1,29 @@
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/soc/qcom/qcom,secure-buffer.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Qualcomm Technologies, Inc. Secure Buffer binding
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maintainers:
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- Isaac J. Manjarres <isaacm@quicinc.com>
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description: |
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The Secure Buffer driver is used to communicate with the ARMv8
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secure world (EL2 and EL3) to secure a buffer, so that only the
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correct clients can use the buffer, and no other entities can
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access it.
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properties:
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compatible:
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items:
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- const: qcom,secure-buffer
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required:
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- compatible
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examples:
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- |
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qcom,secure-buffer {
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compatible = "qcom,secure-buffer";
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};
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