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https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Add higher power levels and ACD configurations for c500 v2
c500 v2 supports additional higher gpu power levels. Also add ACD control register configurations that contain the DVM values for ACD throttling. Change-Id: Ifbee5158ec2c97d5087049fe37acf10ce8477667
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0ca87cbe38
commit
407632aae6
@@ -2,7 +2,7 @@
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compatible = "qcom,adreno-gpu-c500v2", "qcom,kgsl-3d0";
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qcom,initial-pwrlevel = <7>;
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qcom,initial-pwrlevel = <9>;
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qcom,gpu-model = "Adreno730v2";
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@@ -14,82 +14,122 @@
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <818000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <10>;
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qcom,bus-max = <10>;
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qcom,acd-level = <0x882c5ffd>;
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};
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <791000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <9>;
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qcom,bus-max = <10>;
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qcom,acd-level = <0x882c5ffd>;
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};
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <734000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <9>;
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qcom,bus-max = <10>;
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qcom,acd-level = <0x882d5ffd>;
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};
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <640000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <6>;
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qcom,bus-max = <10>;
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qcom,acd-level = <0xa82d5ffd>;
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};
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <599000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <6>;
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qcom,bus-max = <9>;
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qcom,acd-level = <0x882e5ffd>;
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};
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-freq = <545000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <6>;
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qcom,bus-max = <9>;
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qcom,acd-level = <0x882e5ffd>;
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};
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-pwrlevel@6 {
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reg = <6>;
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qcom,gpu-freq = <492000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <6>;
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qcom,bus-max = <8>;
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qcom,acd-level = <0x882e5ffd>;
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};
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-pwrlevel@7 {
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reg = <7>;
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qcom,gpu-freq = <421000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <3>;
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qcom,bus-max = <8>;
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qcom,acd-level = <0xa82e5ffd>;
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};
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qcom,gpu-pwrlevel@6 {
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reg = <6>;
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qcom,gpu-pwrlevel@8 {
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reg = <8>;
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qcom,gpu-freq = <350000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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qcom,bus-freq = <3>;
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qcom,bus-min = <1>;
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qcom,bus-max = <5>;
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qcom,acd-level = <0x882f5ffd>;
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};
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qcom,gpu-pwrlevel@7 {
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reg = <7>;
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qcom,gpu-pwrlevel@9 {
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reg = <9>;
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qcom,gpu-freq = <285000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
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qcom,bus-freq = <2>;
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qcom,bus-min = <1>;
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qcom,bus-max = <5>;
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qcom,acd-level = <0x882f5ffd>;
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};
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};
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};
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