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bindings: clock: Add support for HOLI clock controller

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Update the GCC/DISP/GPU clock controller for HOLI device.

Change-Id: I0b8962a615c8ac810ce7434f298405d9b569757d
This commit is contained in:
Saurabh Sahu
2020-03-18 22:07:19 +05:30
committed by Taniya Das
parent ba317d999c
commit 5aec9f7299
3 changed files with 4 additions and 2 deletions
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1
bindings/clock/qcom,dispcc.txt
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@@ -8,6 +8,7 @@ Required properties :
"qcom,sdm845-dispcc"
"qcom,lahaina-dispcc"
"qcom,shima-dispcc"
"qcom,holi-dispcc"
- reg : shall contain base register location and length.
- #clock-cells : from common clock binding, shall contain 1.

2
bindings/clock/qcom,gcc.txt
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@@ -29,7 +29,7 @@ Required properties :
"qcom,gcc-sa8155"
"qcom,gcc-sa8155-v2"
"qcom,shima-gcc"
"qcom,holi-gcc"
- reg : shall contain base register location and length
- vdd_cx-supply: The vdd_cx logic rail supply.

3
bindings/clock/qcom,gpucc.txt
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@@ -4,7 +4,8 @@ Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding
Required properties :
- compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc",
"qcom,lahaina-gpucc",
"qcom,shima-gpucc".
"qcom,shima-gpucc",
"qcom,holi-gpucc".
- reg: shall contain base register offset and size.
- reg-names: names of registers listed in the same order as in the reg property.
Must contain "cc_base".