Merge "ARM: dts: msm: Add bcm voter devices for lahaina"

bindings/interconnect/qcom,bcm-voter.txt

@@ -0,0 +1,31 @@
+QTI BCM-Voter interconnect driver binding
+-----------------------------------------------------------
+
+The Bus Clock Manager (BCM) is a dedicated hardware accelerator
+that manages shared system resources by aggregating requests
+from multiple Resource State Coordinators (RSC). Interconnect
+providers are able to vote for aggregated thresholds values from
+consumers by communicating through their respective RSCs.
+
+Required properties :
+- compatible : shall contain only one of the following:
+			"qcom,sdm845-bcm-voter",
+			"qcom,bcm-voter",
+
+Examples:
+
+apps_rsc: interconnect@179c0000 {
+	compatible = "qcom,rpmh-rsc";
+
+	apps_bcm_voter: bcm_voter {
+		compatible = "qcom,sdm845-bcm-voter";
+	};
+}
+
+disp_rsc: interconnect@179d0000 {
+	compatible = "qcom,rpmh-rsc";
+
+	disp_bcm_voter: bcm_voter {
+		compatible = "qcom,sdm845-bcm-voter";
+	};
+}

bindings/interconnect/qcom,sdm845.txt

@@ -4,21 +4,49 @@ Qualcomm SDM845 Network-On-Chip interconnect driver binding
 SDM845 interconnect providers support system bandwidth requirements through
 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
 able to communicate with the BCM through the Resource State Coordinator (RSC)
-associated with each execution environment. Provider nodes must reside within
-an RPMh device node pertaining to their RSC and each provider maps to a single
-RPMh resource.
+associated with each execution environment. Provider nodes must point to at
+least one RPMh device child node pertaining to their RSC and each provider
+can map to multiple RPMh resources.
 
 Required properties :
 - compatible : shall contain only one of the following:
-			"qcom,sdm845-rsc-hlos"
+			"qcom,sdm845-aggre1-noc",
+			"qcom,sdm845-aggre2-noc",
+			"qcom,sdm845-config-noc",
+			"qcom,sdm845-dc-noc",
+			"qcom,sdm845-gladiator-noc",
+			"qcom,sdm845-mem-noc",
+			"qcom,sdm845-mmss-noc",
+			"qcom,sdm845-system-noc",
 - #interconnect-cells : should contain 1
+- reg : shall contain base register location and length
+- qcom,bcm-voters : shall contain phandles to bcm voters
+
+Optional properties:
+qcom,bcm-voter-names : List of bcm-voter name strings sorted in the same
+		  order as the qcom,bcm-voters property. The names will
+		  be used to differentiate the specific RSC being targeted.
 
 Examples:
 
-apps_rsc: rsc {
-	rsc_hlos: interconnect {
-		compatible = "qcom,sdm845-rsc-hlos";
-		#interconnect-cells = <1>;
-	};
+mem_noc: interconnect@1380000 {
+	compatible = "qcom,sdm845-mem-noc";
+	reg = <0 0x01380000 0 0x27200>;
+	#interconnect-cells = <1>;
+	qcom,bcm-voter-names = "apps_rsc", "disp_rsc";
+	qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
+};
+aggre1_noc: interconnect@16e0000 {
+	compatible = "qcom,sdm845-aggre1-noc";
+	reg = <0x016e0000 0xd080>;
+	interconnect-cells = <1>;
+	qcom,bcm-voters = <&apps_bcm_voter>;
 };
 
+mmss_noc: interconnect@1740000 {
+	compatible = "qcom,sdm845-mmss-noc";
+	reg = <0x01740000 0x1c1000>;
+	interconnect-cells = <1>;
+	qcom,bcm-voter-names = "apps_rsc", "disp_rsc";
+	qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
+};

qcom/lahaina.dtsi

@@ -843,51 +843,61 @@
 	aggre1_noc: interconnect@16e0000 {
 		compatible = "qcom,lahaina-aggre1_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	aggre2_noc: interconnect@1700000 {
 		compatible = "qcom,lahaina-aggre2_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	config_noc: interconnect@1500000 {
 		compatible = "qcom,lahaina-config_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	dc_noc: interconnect@14e0000 {
 		compatible = "qcom,lahaina-dc_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	gem_noc: interconnect@1380000 {
 		compatible = "qcom,lahaina-gem_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	lpass_ag_noc: interconnect@1480000 {
 		compatible = "qcom,lahaina-lpass_ag_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	mc_virt: interconnect@1580000 {
 		compatible = "qcom,lahaina-mc_virt";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	mmss_noc: interconnect@1740000 {
 		compatible = "qcom,lahaina-mmss_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	nsp_noc: interconnect@1750000 {
 		compatible = "qcom,lahaina-nsp_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	system_noc: interconnect@1620000 {
 		compatible = "qcom,lahaina-system_noc";
 		#interconnect-cells = <1>;
+		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	pil_scm_pas {
@@ -1042,6 +1052,10 @@
 				  <SLEEP_TCS   3>,
 				  <WAKE_TCS    3>,
 				  <CONTROL_TCS 1>;
+
+		apps_bcm_voter: bcm_voter {
+			compatible = "qcom,bcm-voter";
+		};
 	};
 
 	disp_rsc: rsc@af20000 {