Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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Merge "ARM: dts: msm: update phy compatible for anarok phy"

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qctecmdr
2022-08-12 03:54:45 -07:00
committed by Gerrit - the friendly Code Review server
parent 7f35f4b321 df706f98e9
commit 92c1d6d76e
3 changed files with 15 additions and 12 deletions
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5
qcom/anorak-idp.dtsi
View File

@@ -24,7 +24,7 @@
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v4-anorak";
compatible = "qcom,ufs-phy-qmp-v4-anarok";
vdda-phy-supply = <&L2F>;
vdda-pll-supply = <&L2C>;
@@ -43,9 +43,6 @@
vccq-supply = <&L3B>;
vccq-max-microamp = <1200000>;
vccq2-supply = <&L3F>;
vccq2-max-microamp = <800000>;
qcom,vddp-ref-clk-supply = <&L3B>;
qcom,vddp-ref-clk-max-microamp = <100>;

5
qcom/anorak-qxr.dtsi
View File

@@ -23,7 +23,7 @@
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qmp-v4-anorak";
compatible = "qcom,ufs-phy-qmp-v4-anarok";
vdda-phy-supply = <&L2F>;
vdda-pll-supply = <&L2C>;
@@ -42,9 +42,6 @@
vccq-supply = <&L3B>;
vccq-max-microamp = <1200000>;
vccq2-supply = <&L3F>;
vccq2-max-microamp = <800000>;
qcom,vddp-ref-clk-supply = <&L3B>;
qcom,vddp-ref-clk-max-microamp = <100>;

17
qcom/anorak.dtsi
View File

@@ -2292,10 +2292,19 @@
lanes-per-direction = <2>;
clock-names = "ref_clk_src",
"ref_aux_clk",
"qref_clk";
"qref_clk",
"rx_sym0_mux_clk", "rx_sym1_mux_clk", "tx_sym0_mux_clk",
"rx_sym0_phy_clk", "rx_sym1_phy_clk", "tx_sym0_phy_clk";
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
<&gcc GCC_UFS_0_CLKREF_EN>;
<&gcc GCC_UFS_0_CLKREF_EN>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK_SRC>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK_SRC>,
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK_SRC>,
<&ufs_phy_rx_symbol_0_clk>,
<&ufs_phy_rx_symbol_1_clk>,
<&ufs_phy_tx_symbol_0_clk>;
resets = <&ufshc_mem 0>;
status = "disabled";
};
@@ -2415,13 +2424,13 @@
status = "disabled";
qos0 {
mask = <0xf0>;
mask = <0x30>;
vote = <44>;
perf;
};
qos1 {
mask = <0x03>;
mask = <0x0f>;
vote = <44>;
};
};