ARM: dts: qcom: Update limit-rate and add limit-phy-submode on Lahaina

Update limit-rate, 1 stands for Rate-A, 2 stands for Rate-B. In addition,
add limit-phy-submode to select UFS PHY submode used for PHY calibration.

Change-Id: Ifd0d55c0148256cd43d676b3b035c069ebb29fe2
This commit is contained in:
Can Guo
2020-02-04 04:34:05 -08:00
parent 329489d312
commit ddb0ceb64b
3 changed files with 6 additions and 2 deletions

View File

@@ -35,7 +35,10 @@ Optional properties:
- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply
- resets : specifies the PHY reset in the UFS controller
- limit-rate : specifies if the rate has to be limited to A or B.
1 = rate B, 0 = rate A.
1 = rate A, 2 = rate B.
- limit-phy-submode : specifies the PHY submode which is used for PHY calibration,
0 = non-G4, 1 = G4.
Example:
ufsphy1: ufsphy@fc597000 {

View File

@@ -27,7 +27,7 @@
&ufshc_mem {
limit-tx-hs-gear = <1>;
limit-rx-hs-gear = <1>;
limit-rate = <1>;
limit-rate = <2>; /* HS Rate-B */
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vdd-hba-fixed-regulator;

View File

@@ -1411,6 +1411,7 @@
phys = <&ufsphy_mem>;
phy-names = "ufsphy";
lanes-per-direction = <2>;
limit-rate = <1>; /* HS Rate-A */
dev-ref-clk-freq = <0>; /* 19.2 MHz */
clock-names =