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ARM: dts: msm: Disable tpdm ddr for lahaina

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Disable tpdm ddr to avoid register access issue.

Change-Id: Ie7a0922f3d7b09d2c75005d5393576dd424a0e2a
This commit is contained in:
Mao Jinlong
2020-04-02 20:44:24 +08:00
committed by Gerrit - the friendly Code Review server
parent f0227e9ddd
commit f62264a76b
1 changed files with 1 additions and 0 deletions
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qcom/lahaina-coresight.dtsi
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@@ -2433,6 +2433,7 @@
clocks = <&clock_aop QDSS_CLK>;
clock-names = "apb_pclk";
status = "disabled";
qcom,msr-fix-req;
out-ports {