Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: Configure RX sleep state with GPIO mode for wakeup

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This change configures sleep state of UART RX line into GPIO mode to
support the wakeup feature. Pinctrl driver and wakeup functionality
expects PIN to be in gpio mode.

Change-Id: If4133645023050bf93b96ba8c358baa1ef87f3e6
This commit is contained in:
Mukesh Kumar Savaliya
2021-03-05 20:18:14 +05:30
committed by Gerrit - the friendly Code Review server
parent d4238e8eb0
commit f794bd404b
2 changed files with 34 additions and 7 deletions
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33
qcom/waipio-pinctrl.dtsi
View File

@@ -1396,14 +1396,14 @@
};
};
qupv3_se20_ctsrx: qupv3_se20_ctsrx {
qupv3_se20_cts: qupv3_se20_cts {
mux {
pins = "gpio76", "gpio79";
pins = "gpio76";
function = "qup20";
};
config {
pins = "gpio76", "gpio79";
pins = "gpio76";
drive-strength = <2>;
bias-disable;
};
@@ -1434,6 +1434,33 @@
bias-pull-up;
};
};
/* RX to be in gpio mode for sleep config */
qupv3_se20_rx_wake: qupv3_se20_rx_wake {
mux {
pins = "gpio79";
function = "gpio";
};
config {
pins = "gpio79";
drive-strength = <2>;
bias-disable;
};
};
qupv3_se20_rx_active: qupv3_se20_rx_active {
mux {
pins = "gpio79";
function = "qup20";
};
config {
pins = "gpio79";
drive-strength = <2>;
bias-disable;
};
};
};
nfc {

8
qcom/waipio-qupv3.dtsi
View File

@@ -1069,10 +1069,10 @@
pinctrl-names = "default", "active", "sleep";
pinctrl-0 = <&qupv3_se20_default_cts>,
<&qupv3_se20_default_rtsrx>, <&qupv3_se20_default_tx>;
pinctrl-1 = <&qupv3_se20_ctsrx>, <&qupv3_se20_rts>,
<&qupv3_se20_tx>;
pinctrl-2 = <&qupv3_se20_ctsrx>, <&qupv3_se20_rts>,
<&qupv3_se20_tx>;
pinctrl-1 = <&qupv3_se20_cts>, <&qupv3_se20_rts>,
<&qupv3_se20_tx>, <&qupv3_se20_rx_active>;
pinctrl-2 = <&qupv3_se20_cts>, <&qupv3_se20_rts>,
<&qupv3_se20_tx>, <&qupv3_se20_rx_wake>;
qcom,wakeup-byte = <0xFD>;
qcom,wrapper-core = <&qupv3_2>;
status = "disabled";