Lina Iyer 65b8a22ac0 dt-bindings: pdc: Add SPI config register ...

In addition to configuring the PDC, additional registers that interface
the GIC have to be configured to match the GPIO type. The registers on
some QCOM SoCs are access restricted, while on other SoCs are not. They
SoCs with access restriction to these SPI registers need to be written
from the firmware using the SCM interface. Add a flag to indicate if the
register is to be written using SCM interface.

Change-Id: I89ba52ded2451071973b81c83a53964d7ec2e486

2019-10-01 16:28:43 +05:30

bindings

dt-bindings: pdc: Add SPI config register

2019-10-01 16:28:43 +05:30

qcom

Merge "ARM: dts: msm: Correct the UFS PHY address space for Lahaina"

2019-09-26 14:37:32 -07:00

Makefile

ARM: dts: vendor: Add an initial Makefile to the vendor

2019-06-04 16:50:48 -07:00

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