Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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ARM: dts: msm: Add support for DEBUGCC node for SDXPINN

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Add the support for debug clock controller node for SDXPINN platform.

Change-Id: I17edde591410b356bba0736721924f534d6d1112
This commit is contained in:
Imran Shaik
2022-07-27 17:58:44 +05:30
parent 0cd29767d6
commit f63ea151cf
2 changed files with 27 additions and 0 deletions
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5
qcom/sdxpinn-rumi.dtsi
View File

@@ -171,6 +171,11 @@
clock-output-names = "rpmh_clocks";
};
&debugcc {
clocks = <&bi_tcxo>, <&gcc 0>;
clock-names = "xo_clk_src", "gcc";
};
&gcc {
clocks = <&bi_tcxo>, <&pcie20_phy_aux_clk>, <&pcie_1_pipe_clk>, <&pcie_2_pipe_clk>,
<&pcie_pipe_clk>, <&sleep_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>;

22
qcom/sdxpinn.dtsi
View File

@@ -529,6 +529,28 @@
#reset-cells = <1>;
};
apsscc: syscon@17aa0000 {
compatible = "syscon";
reg = <0x17aa0000 0x1c>;
};
mccc: syscon@190ba000 {
compatible = "syscon";
reg = <0x190ba000 0x54>;
};
debugcc: clock-controller@0 {
compatible = "qcom,sdxpinn-debugcc";
qcom,apsscc = <&apsscc>;
qcom,gcc = <&gcc>;
qcom,mccc = <&mccc>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc 0>;
clock-names = "xo_clk_src",
"gcc";
#clock-cells = <1>;
};
/* GCC GDSCs */
gcc_emac0_gdsc: qcom,gdsc@f1004 {
compatible = "qcom,gdsc";