Evolution-x-devices/kernel_xiaomi_sm8450-devicetrees
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ARM: dts: msm: add reset control support for UFS PHY on Lahaina

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Add reset control nodes for UFS PHY so that UFS PHY driver can control its
SW reset through UFS host's address space.

Change-Id: I8ef347733d611af7dfb1a9ecce10f8a5b5898e9b
This commit is contained in:
Can Guo
2019-10-09 21:03:32 -07:00
parent 979e6f3a25
commit 9ac2a5d80b
1 changed files with 4 additions and 0 deletions
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4
qcom/lahaina.dtsi
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@@ -960,6 +960,9 @@
"ref_aux_clk";
clocks = <&clock_rpmh RPMH_CXO_CLK>,
<&clock_gcc GCC_UFS_PHY_PHY_AUX_CLK>;
resets = <&ufshc_mem 0>;
status = "disabled";
};
@@ -969,6 +972,7 @@
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufsphy_mem>;
phy-names = "ufsphy";
#reset-cells = <1>;
lanes-per-direction = <2>;
dev-ref-clk-freq = <0>; /* 19.2 MHz */