Evolution-x-devices/kernel_oneplus_sm8550-devicetrees
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Author SHA1 Message Date
Bruno Martins
9764b6b12d Import graphics-devicetree from ASUS_AI2205-33.0820.0810.121 2023-09-14 10:12:19 +01:00
Bruno Martins
a2ce0aade0 Import eva-devicetree from ASUS_AI2205-33.0820.0810.121 2023-09-14 10:12:16 +01:00
Bruno Martins
268f0c2236 Import eSE-devicetree from ASUS_AI2205-33.0820.0810.121 2023-09-14 10:11:00 +01:00
Bruno Martins
35010bf3fc Import data-devicetree from ASUS_AI2205-33.0820.0810.121 2023-09-14 10:11:00 +01:00
Bruno Martins
9da524a558 Import bt-devicetree from ASUS_AI2205-33.0820.0810.121 2023-09-14 10:11:00 +01:00
Bruno Martins
80b8f450f6 Add 'qcom/video/' from commit '9ad63df640420efc37b5f53f6d616b0421f8913d' 
git-subtree-dir: qcom/video
git-subtree-mainline: 2acdfb55cb
git-subtree-split: 9ad63df640
 2023-09-14 09:56:51 +01:00
Bruno Martins
2acdfb55cb Add 'qcom/mmrm/' from commit 'a53e8c9dcd51e716d41a4b89051b8f91d9cefe2b' 
git-subtree-dir: qcom/mmrm
git-subtree-mainline: 2c4116e901
git-subtree-split: a53e8c9dcd
 2023-09-14 09:56:16 +01:00
Bruno Martins
2c4116e901 Add 'qcom/display/' from commit 'b5a12ea2e2a4505213fa7683c0d14465297cacf1' 
git-subtree-dir: qcom/display
git-subtree-mainline: 10c052b09e
git-subtree-split: b5a12ea2e2
 2023-09-14 09:55:25 +01:00
Bruno Martins
10c052b09e Add 'qcom/camera/' from commit '5b36b211bf961f7595688a6311754d02792cccd3' 
git-subtree-dir: qcom/camera
git-subtree-mainline: e714b50f91
git-subtree-split: 5b36b211bf
 2023-09-14 09:53:35 +01:00
Bruno Martins
e714b50f91 Add 'qcom/audio/' from commit '78cf7aff2d639f02e652d9aca574dfb4fad3a477' 
git-subtree-dir: qcom/audio
git-subtree-mainline: 5560e28a4b
git-subtree-split: 78cf7aff2d
 2023-09-14 09:45:10 +01:00
Linux Build Service Account
5560e28a4b Merge abde633477 on remote branch 
Change-Id: If80ed215053886d2bdc826cc94c2f6f2badd3f52
 2022-12-01 00:57:41 -08:00
Linux Build Service Account
b5a12ea2e2 Merge ebf7d94ee3 on remote branch 
Change-Id: I5d4b8d43d5953924c46a4e5f6d5a4f230d1fdda9
 2022-11-30 23:58:52 -08:00
Linux Build Service Account
9ad63df640 Merge 5999d6dc38 on remote branch 
Change-Id: I4eba88c4f6748d0e2897cd1a5c706fc8363273ec
 2022-11-30 23:53:21 -08:00
qctecmdr
abde633477 Merge "ARM: dts: msm: add audio nodes on lemans" 2022-11-24 13:42:35 -08:00
qctecmdr
f4c808943d Merge "Revert "ARM: dts: msm: skip qos for lemans"" 2022-11-24 13:42:34 -08:00
qctecmdr
c971431b44 Merge "ARM: dts: msm: Add LTR threshold support for sdxpinn" 2022-11-24 13:42:34 -08:00
qctecmdr
24ee62d73f Merge "ARM: dts: msm: Set QSERDES_COM_SYSCLK_EN to 0x8 for PCIe2 PHY for sdxpinn" 2022-11-24 13:42:34 -08:00
qctecmdr
87cea4eada Merge "ARM: dts: msm: Add tz_log device node for lemans" 2022-11-24 13:42:34 -08:00
qctecmdr
7a7effd5eb Merge "ARM: dts: msm: Set boot option 1 to enumeration request by WLAN for sdxpinn" 2022-11-24 13:42:34 -08:00
qctecmdr
b4f04f2490 Merge "ARM: dts: qcom: Add the qrng node for the Auto VM direwolf platforms" 2022-11-24 04:41:30 -08:00
qctecmdr
9ad6ce0c13 Merge "ARM: dts: msm: Update qseecom memory node for SDMSHRIKE" 2022-11-24 04:41:29 -08:00
Linux Build Service Account
8e3e8991c5 Merge "ARM: dts: msm: Add keepalive flag for QUP for Khaje" into kernel.lnx.5.15.r1-rel 2022-11-23 23:03:40 -08:00
Shilpa Suresh
3e2bf8b928 ARM: dts: msm: Skip BW vote for PM8008 used I2C SE node 
Enable flag "qcom,leica-used-i2c" to skip BW vote for PM8008
used I2C instance to prevent deadlock condition between regulator
and clocks framework.

Change-Id: I4cc09d972d6097d8d6bdc74705407f838e08c793
 2022-11-23 21:55:21 -08:00
Chetan C R
c80bfa46f0 ARM: dts: msm: Add keepalive flag for QUP for Khaje 
Add keep-alive flag for QUP node to keep a minimal vote
(19.2MHz)for QUP clocks in active state.

Change-Id: I6e9b7cee1433995555aec8cf48550293b0eb9cb8
 2022-11-23 21:52:45 -08:00
Erin Yan
59e9f88869 ARM: dts: msm: add audio nodes on lemans 
Add pinctrl nodes for audio interfaces on lemans.
Add audio used i2c and spi devices.

Change-Id: Iee6294557a9765c9a2e911e03d0ad6ac62f7787c
 2022-11-22 20:16:57 -08:00
LADI RAM SAI
2d88f44959 ARM: dts: qcom: Remove delay in phy-init-seq of USB1 SS-PHY 
Remove delay in qmp-phy-init-seq of USB1 ssphy for auto sa8155 vm.

Change-Id: I849e444c5e70070ed690cd5e26f7295e82bc1c26
 2022-11-22 15:09:07 +05:30
vagdhan kumar kanukurthi
20ae343565 ARM: dts: qcom: Add the qrng node for the Auto VM direwolf platforms 
Add the qrng node for the Auto VM direwolf platform for generate random
number.

Change-Id: If05e6ae7a882d789fd7e5624186a1e4108d15acb
 2022-11-22 11:43:24 +05:30
qctecmdr
a07b4199b5 Merge "ARM: dts: msm: Make PCIe0 to enumerate with x2 lane for sdxpinn" 2022-11-21 17:08:45 -08:00
qctecmdr
7d9bd4ee90 Merge "ARM: dts: msm: Add EP-PCIe PHY settings for sdxbaagha" 2022-11-21 02:21:33 -08:00
qctecmdr
900db9d7e5 Merge "ARM: dts: qcom: Add aon interface node" 2022-11-21 02:21:33 -08:00
qctecmdr
d88018b564 Merge "ARM: dts: msm: Add initial device tree for Lemans QAM platform" 2022-11-21 02:21:33 -08:00
Jyothi Kumar Seerapu
0b617a81ab ARM: dts: msm: Set boot option 1 to enumeration request by WLAN for sdxpinn 
For WLAN attaches the enumeration request should be done by WLAN.
And then PCIe Root complex will perform the enumeration process.

Change-Id: Ic7f897c374cf78d91113cfcced8cf8abd10ac07c
 2022-11-21 02:06:33 -08:00
Jyothi Kumar Seerapu
680058afe8 ARM: dts: msm: Set QSERDES_COM_SYSCLK_EN to 0x8 for PCIe2 PHY for sdxpinn 
For PCIe 2 PHY setting of QSERDES_COM_SYSCLK_EN to 0x4 which is
internal diff cml clock, PHY is not coming up and hence changed the
PCIe 2 PHY setting of QSERDES_COM_SYSCLK_EN to 0x8 which is SE cmos clock.

Corrected SLV_Q2A_AXI_CLK clock for PCIe2.

Updated reset names of core and phy of PCIe0.

Change-Id: Ib227f03e2ddc4c581d538152e54fe036aef29895
 2022-11-21 02:06:25 -08:00
Jyothi Kumar Seerapu
b66a818737 ARM: dts: msm: Add LTR threshold support for sdxpinn 
Added the multiplier for L1.2 LTR threshold value and
L1.2 latency tolerance reporting value for sdxpinn.

Change-Id: I9310efcbb3b09875118bf3ce376335884aaf6e55
 2022-11-21 02:06:15 -08:00
Jyothi Kumar Seerapu
1ac8836230 ARM: dts: msm: Make PCIe0 to enumerate with x2 lane for sdxpinn 
Some sdxpinn targets have fuse blown parts and so in those targets
one PCIe lane got disabled for PCIe0 and such devices are
enumerates with x1 lane width.

Hence, updated in PHY settings for PCIe0 to make sure that device
enumerate with x2 lane width for PCIe0 of all sdxpinn targets.

Change-Id: I2fdac831e670c2573541cb2e53a8c0f252f7f6e5
 2022-11-21 02:06:09 -08:00
Veera Vegivada
80c51c541c Revert "ARM: dts: msm: skip qos for lemans" 
This reverts commit b2fd6db23b.

Change-Id: I59ac26933387a50541ac4c8db0da5e0a22587cc9
 2022-11-21 01:00:19 -08:00
Praveen koya
f80ed7bfb6 ARM: dts: qcom: Add aon interface node 
Add aon interface node to be used by monaco.

Change-Id: I0606b810556506d8c9feadd1e72f112f9f11ec14
 2022-11-21 09:45:48 +05:30
qctecmdr
2d3606f3aa Merge "ARM: dts: msm: Add EP-PCIe and MHI device configuration for sdxbaagha" 2022-11-19 17:27:18 -08:00
qctecmdr
f4e6f6a1ba Merge "ARM: dts: msm: add silentboot reboot modes for SM8150" 2022-11-18 09:55:05 -08:00
qctecmdr
a4b0ef4a39 Merge "ARM: dts: msm: Add firmware node for auto gvm" 2022-11-18 09:55:05 -08:00
Praveen koya
8e5313f82c ARM: dts: qcom: use qupv3_se4_spi label to enable aon spi 
Move the aon-spi dt node out of soc and use qupv3_se4_spi label
to enable aon-spi dt node.

Set slatecom SPI speed as 40MHz.

Change-Id: I517f5f3a0806396b86a40baa8fb4fe0aff014957
 2022-11-18 20:48:59 +05:30
qctecmdr
772e4c0df2 Merge "ARM: dts: msm: Add compatible string for kgsl_smmu" 2022-11-18 07:03:45 -08:00
qctecmdr
6af32f3f1e Merge "ARM: dts: msm: Add flag to know if APSS based l1ss-sleep is supported or not" 2022-11-18 07:03:45 -08:00
qctecmdr
2207135020 Merge "ARM: dts: msm: Add RPMh controlled PMIC regulators for sdxbaagha" 2022-11-18 07:03:45 -08:00
qctecmdr
bc869f6f66 Merge "ARM: dts: msm: Add sdcard support for SA8195" 2022-11-18 07:03:44 -08:00
qctecmdr
9e00c30704 Merge "ARM: dts: msm: Add virtio_spmi node for direwolf vm" 2022-11-18 07:03:44 -08:00
qctecmdr
69f4a19580 Merge "ARM: dts: msm: correct the name of tpdm swao-prio-0 for cinder" 2022-11-18 02:25:28 -08:00
qctecmdr
4bf8b6a3f0 Merge "ARM: dts: msm: Fixing compilaion issue in pinctrl file" 2022-11-18 02:25:28 -08:00
qctecmdr
0d01558983 Merge "ARM: dts: msm: Add MVMSS clock for QoS programming for SDXPINN" 2022-11-18 02:25:27 -08:00
Sai Chaitanya Kaveti
c29e2d217c ARM: dts: msm: Add EP-PCIe PHY settings for sdxbaagha 
Add EP-PCIe PHY settings for sdxbaagha as per HSR. Making the PHY
version as 8 for 4nm QMP PHY.

Change-Id: I379db95921f86e37cd7e4e3c57924fbc36970a75
 2022-11-18 14:53:36 +05:30